James Poe
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
5
Venues
3
Active years
2006–2009
Best venue rank
B
Where they publish
Papers
5 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2009 | ICS | TransMetric: architecture independent workload characterization for transactional memory benchmarks. | James Poe, Clay Hughes, Tao Li |
| 2009 | MASCOTS | Accurate, scalable and informative design space exploration for large and sophisticated multi-core oriented architectures. | Chang-Burm Cho, James Poe, Tao Li, Jingling Yuan |
| 2009 | MASCOTS | TransPlant: A parameterized methodology for generating transactional memory workloads. | James Poe, Clay Hughes, Tao Li |
| 2008 | SBAC-PAD | Using Analytical Models to Efficiently Explore Hardware Transactional Memory and Multi-Core Co-Design. | James Poe, Chang-Burm Cho, Tao Li |
| 2006 | MASCOTS | Characterizing Microarchitecture Soft Error Vulnerability Phase Behavior. | Xin Fu, James Poe, Tao Li, Jos A. B. Fortes |