Jason Lowe-Power
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
19
Venues
9
Active years
2018–2026
Best venue rank
A*
Where they publish
Papers
19 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2026 | HPCA | Nugget: Portable Program Snippets. | Zhantong Qiu, Mahyar Samani, Jason Lowe-Power |
| 2026 | ISPASS | Characterization of Coherent Data Movement in Scaled-Out Shared Memory Systems. | Maryam Babaie, Michael R. Miller, Wendy Elsasser, Steven C. Woo, Jason Lowe-Power |
| 2026 | ISPASS | Toward Reproducible and Standardized Computer Architecture Simulation with gem5. | Kunal Pai, Harshil Patel, Erin Le, Noah Krim, Mahyar Samani, Bobby R. Bruce, Jason Lowe-Power |
| 2025 | AsiaCCS | FP-Rowhammer: DRAM-Based Device Fingerprinting. | Hari Venugopalan, Kaustav Goswami, Zain ul Abi Din, Jason Lowe-Power, Samuel T. King, Zubair Shafiq |
| 2025 | HPCA | Efficient Caching with A Tag-enhanced DRAM. | Maryam Babaie, Ayaz Akram, Wendy Elsasser, Brent Haukness, Michael R. Miller, Taeksang Song, Thomas Vogelsang, Steven C. Woo, Jason Lowe-Power |
| 2025 | HPCA | NOVA: A Novel Vertex Management Architecture for Scalable Graph Processing. | Marjan Fariborz, Mahyar Samani, Austin York, S. J. Ben Yoo, Jason Lowe-Power, Venkatesh Akella |
| 2025 | SC | Implications of Full-System Modeling for Superconducting Architectures. | Kunal Pai, Mahyar Samani, Anusheel Nand, Jason Lowe-Power |
| 2025 | SC | TEGRA - Scaling Up Graph Processing with Disaggregated Computing. | William Shaddix, Mahyar Samani, Jason Lowe-Power, Venkatesh Akella |
| 2023 | ISPASS | Enabling Design Space Exploration of DRAM Caches for Emerging Memory Systems. | Maryam Babaie, Ayaz Akram, Jason Lowe-Power |
| 2021 | HPCA | Stream Floating: Enabling Proactive and Decentralized Cache Optimizations. | Zhengrong Wang, Jian Weng, Jason Lowe-Power, Jayesh Gaur, Tony Nowatzki |
| 2021 | ISPASS | Enabling Reproducible and Agile Full-System Simulation. | Bobby R. Bruce, Ayaz Akram, Hoa Nguyen, Kyle Roarty, Mahyar Samani, Marjan Fariborz, Trivikram Reddy, Matthew D. Sinclair, Jason Lowe-Power |
| 2021 | ISPASS | A Case Against Hardware Managed DRAM Caches for NVRAM Based Systems. | Mark Hildebrand, Julian T. Angeles, Jason Lowe-Power, Venkatesh Akella |
| 2020 | ASPLOS | AutoTM: Automatic Tensor Movement in Heterogeneous Memory Systems using Integer Linear Programming. | Mark Hildebrand, Jawad Khan, Sanjeev Trika, Jason Lowe-Power, Venkatesh Akella |
| 2020 | ICPP | HCAPP: Scalable Power Control for Heterogeneous 2.5D Integrated Systems. | Kramer Straube, Jason Lowe-Power, Christopher Nitta, Matthew K. Farrens, Venkatesh Akella |
| 2019 | ISPASS | FlexCPU: A Configurable Out-of-Order CPU Abstraction. | Bradley Wang, Ayaz Akram, Jason Lowe-Power |
| 2019 | WCAE | The Davis In-Order (DINO) CPU: A Teaching-focused RISC-V CPU Design. | Jason Lowe-Power, Christopher Nitta |
| 2018 | ASPLOS | Filtering Translation Bandwidth with Virtual Caching. | Hongil Yoon, Jason Lowe-Power, Gurindar S. Sohi |
| 2018 | HiPC | Improving Provisioned Power Efficiency in HPC Systems with GPU-CAPP. | Kramer Straube, Jason Lowe-Power, Christopher Nitta, Matthew K. Farrens, Venkatesh Akella |
| 2018 | ISCA | A case for exposing extra-architectural state in the ISA: position paper. | Jason Lowe-Power, Venkatesh Akella, Matthew K. Farrens, Samuel T. King, Christopher J. Nitta |