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Javier Castro-Ramirez

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

3

Venues

2

Active years

2007–2014

Best venue rank

C

Where they publish

Papers

3 indexed papers, newest first.

YearVenueTitleAuthors
2014DSDLow-Power Differential Logic Gates for DPA Resistant Circuits.Erica Tena-Snchez, Javier Castro-Ramirez, Antonio J. Acosta
2010ISCASOptimization of clock-gating structures for low-leakage high-performance applications.Javier Castro-Ramirez, Pilar Parra Fernndez, Antonio J. Acosta
2007ISCASAsymmetric clock driver for improved power and noise performances.Javier Castro-Ramirez, Pilar Parra Fernndez, Manuel Valencia-Barrero, Antonio J. Acosta