Javier Jalle
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
6
Venues
4
Active years
2014–2016
Best venue rank
A*
Where they publish
Papers
6 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2016 | RTAS | Improving Early Design Stage Timing Modeling in Multicore Based Real-Time Systems. | David Trilla, Javier Jalle, Mikel Fernndez, Jaume Abella, Francisco J. Cazorla |
| 2015 | DAC | Increasing confidence on measurement-based contention bounds for real-time round-robin buses. | Gabriel Fernandez, Javier Jalle, Jaume Abella, Eduardo Quiones, Tullio Vardanega, Francisco J. Cazorla |
| 2015 | DAC | Resource usage templates and signatures for COTS multicore processors. | Gabriel Fernandez, Javier Jalle, Jaume Abella, Eduardo Quiones, Tullio Vardanega, Francisco J. Cazorla |
| 2014 | DATE | Bus designs for time-probabilistic multicore processors. | Javier Jalle, Leonidas Kosmidis, Jaume Abella, Eduardo Quiones, Francisco J. Cazorla |
| 2014 | RTSS | A Dual-Criticality Memory Controller (DCmc): Proposal and Evaluation of a Space Case Study. | Javier Jalle, Eduardo Quiones, Jaume Abella, Luca Fossati, Marco Zulianello, Francisco J. Cazorla |
| 2014 | RTAS | AHRB: A high-performance time-composable AMBA AHB bus. | Javier Jalle, Jaume Abella, Eduardo Quiones, Luca Fossati, Marco Zulianello, Francisco J. Cazorla |