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Jean-Luc Bchennec

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

28

Venues

21

Active years

1988–2026

Best venue rank

A*

Where they publish

Papers

28 indexed papers, newest first.

YearVenueTitleAuthors
2026RTASWork in Progress: Exploring Timing Anomalies in Multi-Core Systems with Time Petri Nets.Maha Essabyr, Florian Brandner, Mihail Asavoae, Sbastien Faucou, Jean-Luc Bchennec
2025DSDCircadia: Checkpointing for Intermittent Computing in AI Driven Applications.Matthieu Rodet, Jean-Luc Bchennec, Mikal Briday, Sbastien Faucou, Isabelle Puaut, Erven Rohou
2025SACVerifying Timed Properties of Programs in IoT nodes using Parametric Time Petri Nets.tienne Andr, Jean-Luc Bchennec, Sudipta Chattopadhyay, Sbastien Faucou, Didier Lime, Dylan Marinho, Olivier H. Roux, Jun Sun
2024CGOSCHEMATIC: Compile-Time Checkpoint Placement and Memory Allocation for Intermittent Systems.Hugo Reymond, Jean-Luc Bchennec, Mikal Briday, Sbastien Faucou, Isabelle Puaut, Erven Rohou
2024RTCSAEarlyBird: Energy belongs to those who wake up early.Hugo Reymond, Jean-Luc Bchennec, Mikal Briday, Sbastien Faucou, Isabelle Puaut, Erven Rohou
2023DATESecuring a RISC-V architecture: A dynamic approach.Sbastien Pillement, Maria Mendez Real, J. Pottier, T. Nieddu, Bertrand Le Gal, Sbastien Faucou, Jean-Luc Bchennec, Mikal Briday, Sylvain Girbal, Jimmy Le Rhun, Olivier Gilles, Daniel Gracia Prez, Andr Sintzoff, Jean-Roch Coulon
2022CoDITHigh-level Colored Time Petri Nets for true concurrency modeling in real-time software.Imane Haur, Jean-Luc Bchennec, Olivier H. Roux
2022ICFEMFormal Verification of the Inter-core Synchronization of a Multi-core RTOS Kernel.Imane Haur, Jean-Luc Bchennec, Olivier H. Roux
2021RTNSFormal schedulability analysis based on multi-core RTOS model.Imane Haur, Jean-Luc Bchennec, Olivier Henri Roux
2020RTNSRequirement specification and model-checking of a real-time scheduler implementation.Khaoula Boukir, Jean-Luc Bchennec, Anne-Marie Dplanche
2018CoDITFormal model-based conformance verification of an OSEK/VDX compliant RTOS.Jean-Luc Bchennec, Olivier Henry Roux, Tigori Kabland Toussaint Gautier
2018EDCCHardware Runtime Verification of a RTOS Kernel: Evaluation Using Fault Injection.Dimitry Solet, Jean-Luc Bchennec, Mikal Briday, Sbastien Faucou, Sbastien Pillement
2018RTNSFormal approach for a verified implementation of Global EDF in Trampoline.Khaoula Boukir, Jean-Luc Bchennec, Anne-Marie Dplanche
2017VECoSWCET Analysis by Model Checking for a Processor with Dynamic Branch Prediction.Armel Mangean, Jean-Luc Bchennec, Mikal Briday, Sbastien Faucou
2015HPCCFormal Synthesis of Optimal RTOS.Tigori Kabland Toussaint Gautier, Jean-Luc Bchennec, Olivier Henry Roux
2014SIMULTECHReactive embedded device driver synthesis using logical timed models.Julien Tanguy, Jean-Luc Bchennec, Mikal Briday, Olivier H. Roux
2013ETFADevice driver synthesis for embedded systems.Julien Tanguy, Jean-Luc Bchennec, Mikal Briday, Sebastien Dube, Olivier H. Roux
2012HPCCA Data Flow Monitoring Service Based on Runtime Verification for AUTOSAR.Sylvain Cotard, Sbastien Faucou, Jean-Luc Bchennec, Audrey Queudet, Yvon Trinquet
2006ETFATrampoline An Open Source Implementation of the OSEK/VDX RTOS Specification.Jean-Luc Bchennec, Mikal Briday, Sbastien Faucou, Yvon Trinquet
2000HPCAThe Best Distribution for a Parallel OpenGL 3D Engine with Texture Caches.Alexis Vartanian, Jean-Luc Bchennec, Nathalie Drach-Temam
1999EuroParA Parallel Algorithm for 3D Geometry Transformations in OpenGL.Julien Sbot, Alexis Vartanian, Jean-Luc Bchennec, Nathalie Drach-Temam
1999EuroParPopSPY: A PowerPC Instrumentation Tool for Multiprocessor Simulation.Claude Limousin, Alexis Vartanian, Jean-Luc Bchennec
1999EuroParTwo Schemes to Improve the Performance of aAlexis Vartanian, Jean-Luc Bchennec, Nathalie Drach-Temam
1998ICSEvaluation of High Performance Multicache Parallel Texture Mapping.Alexis Vartanian, Jean-Luc Bchennec, Nathalie Drach-Temam
1998WCAEASF: a teaching and rsearch object-oriented simulation tool for computer architecture design and performance evaluation.Jean-Luc Bchennec
1993ICPPBalanced Distributed Memory Parallel Computers.Franck Cappello, Jean-Luc Bchennec, Franck Delaplace, Ccile Germain, Jean-Louis Giavitto, Vincent Nri, Daniel Etiemble
1993PDPStatic computation of standard linear algebra subroutines for PTAH.E. Daugeras, Jean-Luc Bchennec, Franck Cappello
1988ICCDA highly parallel processor with an instruction set including relational algebra.Pascal Faudemay, Daniel Etiemble, Jean-Luc Bchennec