Jiadong Huang
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
2019–2019
Best venue rank
National
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2019 | TASE | Hardware Tripartite Synapse Architecture based on Stochastic Computing. | Junxiu Liu, Zhewei Liang, Yuling Luo, Jiadong Huang, Su Yang |