Jichao Huang
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
2
Venues
1
Active years
2016–2018
Best venue rank
C
Where they publish
Papers
2 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2018 | ISCAS | A Sub-ps Integrated-Jitter 10 GHz ADPLL with Fractional Capacitor. | Linqi Shi, Weixin Gai, Jichao Huang, Liangxiao Tang, Xiao Xiang |
| 2016 | ISCAS | A 1.27mW 20Gbps 1: 16 DEMUX with a symmetrical-edge-delay sense amplifier. | Shihao Li, Weixin Gai, Xiao Xiang, Liangxiao Tang, Jichao Huang, Tong Zhao, Xiaoting Zhi |