Jih-Ching Chiu
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
5
Venues
5
Active years
1997–2012
Best venue rank
C
Where they publish
Papers
5 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2012 | ICA3PP | Analytical Modeling for Multi-transaction Bus on Distributed Systems. | Jih-Ching Chiu, Kai-Ming Yang, Chen-Ang Wong |
| 2010 | ICPP | Hyperscalar: A Novel Dynamically Reconfigurable Multi-core Architecture. | Jih-Ching Chiu, Yu-Liang Chou, Po-Kai Chen |
| 2009 | ICS | Design of a novel SIMD architecture by fusing operations and registers. | Jih-Ching Chiu, Kai-Ming Yang, Yu-Liang Chou |
| 2000 | ICCD | Design of Instruction Stream Buffer with Trace Support for X86 Processors. | Jih-Ching Chiu, I-Huan Huang, Chung-Ping Chung |
| 1997 | ICPADS | Instruction Cache Prefetching with Extended BTB. | Shyh-An Chi, R.-Ming Shiu, Jih-Ching Chiu, Si-En Chang, Chung-Ping Chung |