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Jingxiang Hou

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

4

Venues

2

Active years

2025–2026

Best venue rank

A*

Where they publish

Papers

4 indexed papers, newest first.

YearVenueTitleAuthors
2026HPCAMoEntwine: Unleashing the Potential of Wafer-Scale Chips for Large-Scale Expert Parallel Inference.Xinru Tang, Jingxiang Hou, Dingcheng Jiang, Taiquan Wei, Jiaxin Liu, Jinyi Deng, Huizheng Wang, Qize Yang, Haoran Shang, Chao Li, Yang Hu, Shouyi Yin
2026HPCAWATOS: Efficient LLM Training Strategies and Architecture Co-Exploration for Wafer-Scale Chip.Huizheng Wang, Zichuan Wang, Hongbin Wang, Jingxiang Hou, Taiquan Wei, Chao Li, Yang Hu, Shouyi Yin
2026HPCATEMP: A Memory Efficient Physical-Aware Tensor Partition-Mapping Framework on Wafer-Scale Chips.Huizheng Wang, Taiquan Wei, Zichuan Wang, Dingcheng Jiang, Qize Yang, Jiaxin Liu, Jingxiang Hou, Chao Li, Jinyi Deng, Yang Hu, Shouyi Yin
2025ISCAWSC-LLM: Efficient LLM Service and Architecture Co-exploration for Wafer-scale Chips.Zheng Xu, Dehao Kong, Jiaxin Liu, Jinxi Li, Jingxiang Hou, Xu Dai, Chao Li, Shaojun Wei, Yang Hu, Shouyi Yin