| 2026 | ASPDAC | FlowQ: Fixed-point Low-precision Post-Training Quantization Framework for Efficient and Accurate SNN Inference. | Faaiz Asim, Sanhtet Aung, Jongeun Lee |
| 2026 | ASPDAC | EP-HDC: Hyperdimensional Computing with Encrypted Parameters for High-Throughput Privacy-Preserving Inference. | Jaewoo Park, Chenghao Quan, Jongeun Lee |
| 2026 | FCCM | AccelOrb: FPGA Acceleration of Orb v2 for Fast Molecular Dynamics. | Sunjae Kim, Gwanhong Park, Jeawoo Lim, Faaiz Asim, Jongeun Lee |
| 2025 | ICCAD | SPIMA: Scalable and Cost-Efficient Sparse Matrix Multiplication via Processing in DRAM Array. | Tairali Assylbekov, Minsang Yu, Jaewoo Park, Mingon Kim, Seungsu Kim, Jongeun Lee |
| 2024 | ASPDAC | Extending Neural Processing Unit and Compiler for Advanced Binarized Neural Networks. | Minjoon Song, Faaiz Asim, Jongeun Lee |
| 2024 | ICCAD | FlexInt: A New Number Format for Robust Sub-8-Bit Neural Network Inference. | Minuk Hong, Hyeonuk Sim, Sugil Lee, Jongeun Lee |
| 2023 | DAC | NTT-PIM: Row-Centric Architecture and Mapping for Efficient Number-Theoretic Transform on PIM. | Jaewoo Park, Sugil Lee, Jongeun Lee |
| 2023 | ICCAD | Hyperdimensional Computing as a Rescue for Efficient Privacy-Preserving Machine Learning-as-a-Service. | Jaewoo Park, Chenghao Quan, Hyungon Moon, Jongeun Lee |
| 2022 | ACSSC | Multi-Fidelity Nonideality Simulation and Evaluation Framework for Resistive Neuromorphic Computing. | Chenghao Quan, Mohammed E. Fouda, Sugil Lee, Jongeun Lee |
| 2022 | BMVC | Centered Symmetric Quantization for Hardware-Efficient Low-Bit Neural Networks. | Faaiz Asim, Jaewoo Park, Azat Azamat, Jongeun Lee |
| 2022 | CIKM | An Empirical Study on How People Perceive AI-generated Music. | Hyeshin Chu, Joohee Kim, Seongouk Kim, Hongkyu Lim, Hyunwook Lee, Seungmin Jin, Jongeun Lee, Taehwan Kim, Sungahn Ko |
| 2022 | ECCV | Non-uniform Step Size Quantization for Accurate Post-training Quantization. | Sangyun Oh, Hyeonuk Sim, Jounghyun Kim, Jongeun Lee |
| 2022 | ICCAD | Squeezing Accumulators in Binary Neural Networks for Extremely Resource-Constrained Applications. | Azat Azamat, Jaewoo Park, Jongeun Lee |
| 2022 | ICCD | Accurate Prediction of ReRAM Crossbar Performance Under I-V Nonlinearity and IR Drop. | Sugil Lee, Mohammed E. Fouda, Jongeun Lee, Ahmed M. Eltawil, Fadi J. Kurdahi |
| 2021 | CVPR | Automated Log-Scale Quantization for Low-Cost Deep Neural Networks. | Sangyun Oh, Hyeonuk Sim, Sugil Lee, Jongeun Lee |
| 2021 | DATE | Cost- and Dataset-free Stuck-at Fault Mitigation for ReRAM-based Deep Learning Accelerators. | Giju Jung, Mohammed E. Fouda, Sugil Lee, Jongeun Lee, Ahmed M. Eltawil, Fadi J. Kurdahi |
| 2021 | DATE | NP-CGRA: Extending CGRAs for Efficient Processing of Light-weight Deep Neural Networks. | Jungi Lee, Jongeun Lee |
| 2021 | ICCAD | Quarry: Quantization-based ADC Reduction for ReRAM-based Deep Neural Network Accelerators. | Azat Azamat, Faaiz Asim, Jongeun Lee |
| 2021 | ICCD | Fast and Low-Cost Mitigation of ReRAM Variability for Deep Learning Applications. | Sugil Lee, Mohammed E. Fouda, Jongeun Lee, Ahmed M. Eltawil, Fadi J. Kurdahi |
| 2020 | DAC | Learning to Predict IR Drop with Effective Training for ReRAM-based Neural Network Hardware. | Sugil Lee, Giju Jung, Mohammed E. Fouda, Jongeun Lee, Ahmed M. Eltawil, Fadi J. Kurdahi |
| 2020 | ISLPED | SparTANN: sparse training accelerator for neural networks with threshold-based sparsification. | Hyeonuk Sim, Jooyeon Choi, Jongeun Lee |
| 2019 | ASPDAC | On-chip memory optimization for high-level synthesis of multi-dimensional data on FPGA. | Daewoo Kim, Sugil Lee, Jongeun Lee |
| 2019 | ASPDAC | XOMA: exclusive on-chip memory architecture for energy-efficient deep learning acceleration. | Hyeon Uk Sim, Jason Helge Anderson, Jongeun Lee |
| 2019 | ASPDAC | Log-quantized stochastic computing for memory and computation efficient DNNs. | Hyeon Uk Sim, Jongeun Lee |
| 2019 | ASPDAC | Efficient FPGA implementation of local binary convolutional neural network. | Aidyn Zhakatayev, Jongeun Lee |
| 2019 | DAC | Successive Log Quantization for Cost-Efficient Neural Networks Using Stochastic Computing. | Sugil Lee, Hyeon Uk Sim, Jooyeon Choi, Jongeun Lee |
| 2018 | DAC | DPS: dynamic precision scaling for stochastic computing-based deep neural networks. | Hyeon Uk Sim, Saken Kenzhegulov, Jongeun Lee |
| 2018 | DAC | Sign-magnitude SC: getting 10X accuracy for free in stochastic computing for deep neural networks. | Aidyn Zhakatayev, Sugil Lee, Hyeon Uk Sim, Jongeun Lee |
| 2017 | ASPDAC | Scalable stochastic-computing accelerator for convolutional neural networks. | Hyeon Uk Sim, Dong Nguyen, Jongeun Lee, Kiyoung Choi |
| 2017 | DAC | A New Stochastic Computing Multiplier with Application to Deep Convolutional Neural Networks. | Hyeon Uk Sim, Jongeun Lee |
| 2017 | DATE | Double MAC: Doubling the performance of convolutional neural networks on modern FPGAs. | Dong Nguyen, Daewoo Kim, Jongeun Lee |
| 2017 | DATE | Design space exploration of FPGA accelerators for convolutional neural networks. | Atul Rahman, Sangyun Oh, Jongeun Lee, Kiyoung Choi |
| 2017 | ICCD | Accurate and Efficient Stochastic Computing Hardware for Convolutional Neural Networks. | Joonsang Yu, Kyounghoon Kim, Jongeun Lee, Kiyoung Choi |
| 2016 | ASPDAC | An energy-efficient random number generator for stochastic circuits. | Kyounghoon Kim, Jongeun Lee, Kiyoung Choi |
| 2016 | CGO | Communication-aware mapping of stream graphs for multi-GPU platforms. | Dong Nguyen, Jongeun Lee |
| 2016 | DAC | Dynamic energy-accuracy trade-off using stochastic computing in deep neural networks. | Kyounghoon Kim, Jungki Kim, Joonsang Yu, Jungwoo Seo, Jongeun Lee, Kiyoung Choi |
| 2016 | DATE | Efficient FPGA acceleration of Convolutional Neural Networks using logical-3D compute array. | Atul Rahman, Jongeun Lee, Kiyoung Choi |
| 2015 | DAC | Optimizing stream program performance on CGRA-based systems. | Hongsik Lee, Dong Nguyen, Jongeun Lee |
| 2013 | DATE | Compiling control-intensive loops for CGRAs with state-based full predication. | Kyuseung Han, Kiyoung Choi, Jongeun Lee |
| 2013 | DATE | Fast shared on-chip memory architecture for efficient hybrid computing with CGRAs. | Jongeun Lee, Yeonghun Jeong, Sungsok Seo |
| 2011 | DATE | I | Jonghee W. Yoon, Jongeun Lee, Jaewan Jung, Sanghyun Park, Yongjoo Kim, Yunheung Paek, Doosan Cho |
| 2009 | ASPDAC | A software solution for dynamic stack management on scratch pad memory. | Arun Kannan, Aviral Shrivastava, Amit Pabalkar, Jongeun Lee |
| 2009 | ASPDAC | Compiler-managed register file protection for energy-efficient soft error reduction. | Jongeun Lee, Aviral Shrivastava |
| 2009 | DATE | Static analysis to mitigate soft errors in register files. | Jongeun Lee, Aviral Shrivastava |
| 2009 | DATE | FSAF: File system aware flash translation layer for NAND Flash Memories. | Sai Krishna Mylavarapu, Siddharth Choudhuri, Aviral Shrivastava, Jongeun Lee, Tony Givargis |
| 2008 | HiPC | SDRM: Simultaneous Determination of Regions and Function-to-Region Mapping for Scratchpad Memories. | Amit Pabalkar, Aviral Shrivastava, Arun Kannan, Jongeun Lee |