| 2026 | ISCAS | A 0.58 Ops/Trans Analog Compute-in-Memory Macro with Input Operand Generator Supporting Wide Boolean Operations for Enhanced Versatility. | Eun-Bi Koh, Jeong-Eun Ko, Joo-Hyung Chae |
| 2021 | ISCAS | A High-Accuracy and Fast-Correction Quadrature Signal Corrector Using an Adaptive Delay Gain Controller for Memory Interfaces. | Hyunkyu Park, Jihwan Park, Jae-Whan Lee, Yong-Un Jeong, Shin-Hyun Jeong, Suhwan Kim, Joo-Hyung Chae |
| 2019 | ISCAS | A 20Gb/s Dual-Mode PAM4/NRZ Single-Ended Transmitter with RLM Compensation. | Changho Hyun, Hyeongjun Ko, Joo-Hyung Chae, Hyunkyu Park, Suhwan Kim |
| 2019 | ISLPED | A Low-Power and Low-Noise 20: 1 Serializer with Two Calibration Loops in 55-nm CMOS. | Yong-Un Jeong, Joo-Hyung Chae, Sungphil Choi, Jaekwang Yun, Shin-Hyun Jeong, Suhwan Kim |
| 2018 | ISLPED | Energy-Efficient Dynamic Comparator with Active Inductor for Receiver of Memory Interfaces. | Jae-Whan Lee, Joo-Hyung Chae, Jihwan Park, Hyunkyu Park, Jaekwang Yun, Suhwan Kim |
| 2017 | ISLPED | A 0.13pJ/bit, referenceless transceiver with clock edge modulation for a wired intra-BAN communication. | Jihwan Park, Gi-Moon Hong, Mino Kim, Joo-Hyung Chae, Suhwan Kim |