| 2026 | ASPDAC | Precision-Scalable Microscaling Datapaths with Optimized Reduction Tree for Efficient NPU Integration. | Stef Cuyckens, Xiaoling Yi, Robin Geens, Joren Dumoulin, Martin Wiesner, Chao Fang, Marian Verhelst |
| 2026 | ASPLOS | The Configuration Wall: Characterization and Elimination of Accelerator Configuration Overhead. | Josse Van Delm, Anton Lydike, Joren Dumoulin, Jonas Crols, Xiaoling Yi, Ryan Antonio, Jackson Woodruff, Tobias Grosser, Marian Verhelst |
| 2026 | ISCAS | A 16 nm 1.60TOPS/W High Utilization DNN Accelerator with 3D Spatial Data Reuse and Efficient Shared Memory Access. | Xiaoling Yi, Ryan Antonio, Yunhao Deng, Fanchen Kong, Joren Dumoulin, Jun Yin, Marian Verhelst |
| 2026 | ISPASS | Hardware Generation and Exploration of Lookup Table-Based Accelerators for 1.58-bit LLM Inference. | Robin Geens, Joran Heldens, Joren Dumoulin, Marian Verhelst |
| 2025 | ASPDAC | OpenGeMM: A Highly-Efficient GeMM Accelerator Generator with Lightweight RISC-V Control and Tight Memory Coupling. | Xiaoling Yi, Ryan Antonio, Joren Dumoulin, Jiacong Sun, Josse Van Delm, Guilherme Pereira Paim, Marian Verhelst |
| 2025 | ISLPED | An Open-Source HW-SW Co-Development Framework Enabling Efficient Multi-Accelerator Systems. | Ryan Antonio, Joren Dumoulin, Xiaoling Yi, Josse Van Delm, Yunhao Deng, Guilherme Paim, Marian Verhelst |
| 2024 | ISCAS | Enabling Efficient Hardware Acceleration of Hybrid Vision Transformer (ViT) Networks at the Edge. | Joren Dumoulin, Pouya Houshmand, Vikram Jain, Marian Verhelst |