Jussi Roivainen
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
6
Venues
4
Active years
2002–2016
Best venue rank
C
Where they publish
Papers
6 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2016 | SBAC-PAD | Outline of a Thick Control Flow Architecture. | Martti Forsell, Jussi Roivainen, Ville Leppnen |
| 2014 | ACSSC | REPLICA T7-16-128 - A 2048-threaded 16-core 7-FU chained VLIW chip multiprocessor. | Martti Forsell, Jussi Roivainen |
| 2008 | PDPTA | Performance, Area and Power Trade-Offs in Mesh-based Emulated Shared Memory CMP Architectures. | Martti Forsell, Jussi Roivainen |
| 2006 | DSD | Clock-Gating in FPGAs: A Novel and Comparative Evaluation. | Yan Zhang, Jussi Roivainen, Aarne Mmmel |
| 2004 | DSD | IP-Block Based Integration of Very High Performance WLAN Modem. | Jussi Roivainen, Jukka Rautio |
| 2002 | DSD | Configurable Memory Organisation for Communication Applications. | Juha-Pekka Soininen, Antti Pelkonen, Jussi Roivainen |