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Jyun-Kai Chu

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

1

Venues

1

Active years

2012–2012

Best venue rank

C

Where they publish

Papers

1 indexed papers, newest first.

YearVenueTitleAuthors
2012ISCASAn all-digital bit transistor characterization scheme for CMOS 6T SRAM array.Geng-Cing Lin, Shao-Cheng Wang, Yi-Wei Lin, Ming-Chien Tsai, Ching-Te Chuang, Shyh-Jye Jou, Nan-Chun Lien, Wei-Chiang Shih, Kuen-Di Lee, Jyun-Kai Chu