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Karen Maex

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

4

Venues

1

Active years

2002–2005

Best venue rank

A

Where they publish

Papers

4 indexed papers, newest first.

YearVenueTitleAuthors
2005DATEAnalog and Digital Circuit Design in 65 nm CMOS: End of the Road?Georges G. E. Gielen, Wim Dehaene, Phillip Christie, Dieter Draxelmayr, Edmond Janssens, Karen Maex, Ted Vucurevich
2005DATESystematic Analysis of Energy and Delay Impact of Very Deep Submicron Process Variability Effects in Embedded SRAM Modules.Hua Wang, Miguel Miranda, Wim Dehaene, Francky Catthoor, Karen Maex
2004DATEHow Can System-Level Design Solve the Interconnect Technology Scaling Problem?Francky Catthoor, Andrea Cuomo, Grant Martin, Patrick Groeneveld, Rudy Lauwereins, Karen Maex, Patrick van de Steeg, Ron Wilson
2002DATESimple and Efficient Approach for Shunt Admittance Parameters Calculations of VLSI On-Chip Interconnects on Semiconducting Substrate.Hasan Ymeri, Bart Nauwelaers, Karen Maex, David De Roest, Michele Stucchi, Servaas Vandenberghe