Kazunori Watanabe
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
3
Active years
1998–2013
Best venue rank
B
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2013 | ASPDAC | 315MHz OOK transceiver with 38-W receiver and 36-W transmitter in 40-nm CMOS. | Shunta Iguchi, Akira Saito, Kentaro Honda, Yun Fei Zheng, Kazunori Watanabe, Takayasu Sakurai, Makoto Takamiya |
| 2013 | ASPDAC | A low voltage buck DC-DC converter using on-chip gate boost technique in 40nm CMOS. | Xin Zhang, Po-Hung Chen, Yoshikatsu Ryu, Koichi Ishida, Yasuyuki Okuma, Kazunori Watanabe, Takayasu Sakurai, Makoto Takamiya |
| 2012 | ISLPED | 0.35V, 4.1μW, 39MHz crystal oscillator in 40nm CMOS. | Akira Saito, Yun Fei Zheng, Kazunori Watanabe, Takayasu Sakurai, Makoto Takamiya |
| 1998 | PIMRC | An adaptive array antenna using combined DFT and LMS algorithms. | Kazunori Watanabe, Isamu Yoshii, Ryuji Kohno |