Keisuke Korekado
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
2
Venues
1
Active years
2003–2004
Best venue rank
B
Where they publish
Papers
2 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2004 | KES | A Convolutional Neural Network VLSI Architecture Using Thresholding and Weight Decomposition. | Osamu Nomura, Takashi Morie, Keisuke Korekado, Masakazu Matsugu, Atsushi Iwata |
| 2003 | KES | A Convolutional Neural Network VLSI for Image Recognition Using Merged/Mixed Analog-Digital Architecture. | Keisuke Korekado, Takashi Morie, Osamu Nomura, Hiroshi Ando, Teppei Nakano, Masakazu Matsugu, Atsushi Iwata |