| 2008 | ASPDAC | Pessimism reduction in coupling-aware static timing analysis using timing and logic filtering. | Debasish Das, Kip Killpack, Chandramouli V. Kashyap, Abhijit Jas, Hai Zhou |
| 2008 | DAC | Speedpath prediction based on learning from a small set of examples. | Pouria Bastani, Kip Killpack, Li-C. Wang, Eli Chiprout |
| 2008 | ICCAD | Silicon feedback to improve frequency of high-performance microprocessors: an overview. | Chandramouli V. Kashyap, Pouria Bastani, Kip Killpack, Chirayu S. Amin |
| 2007 | DAC | Silicon Speedpath Measurement and Feedback into EDA flows. | Kip Killpack, Chandramouli V. Kashyap, Eli Chiprout |
| 2006 | DAC | A multi-port current source model for multiple-input switching effects in CMOS library cells. | Chirayu S. Amin, Chandramouli V. Kashyap, Noel Menezes, Kip Killpack, Eli Chiprout |
| 2006 | ICCD | FA-STAC: A Framework for Fast and Accurate Static Timing Analysis with Coupling. | Debasish Das, Ahmed Shebaita, Hai Zhou, Yehea I. Ismail, Kip Killpack |
| 2005 | DAC | Statistical static timing analysis: how simple can we get? | Chirayu S. Amin, Noel Menezes, Kip Killpack, Florentin Dartu, Umakanta Choudhury, Nagib Hakim, Yehea I. Ismail |