Ko Yoshikawa
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
2
Active years
1991–2006
Best venue rank
A*
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2006 | DAC | Budgeting-free hierarchical design method for large scale and high-performance LSIs. | Yuichi Nakamura, Mitsuru Tagata, Takumi Okamoto, Shigeyoshi Tawada, Ko Yoshikawa |
| 2004 | ASPDAC | Timing optimization by replacing flip-flops to latches. | Ko Yoshikawa, Yasuhiko Hagihara, Keisuke Kanamaru, Yuichi Nakamura, Shigeto Inui, Takeshi Yoshimura |
| 2004 | DAC | A fast hardware/software co-verification method for system-on-a-chip by using a C/C++ simulator and FPGA emulator with shared register communication. | Yuichi Nakamura, Kohei Hosokawa, Ichiro Kuroda, Ko Yoshikawa, Takeshi Yoshimura |
| 1991 | DAC | Timing Optimization on Mapped Circuits. | Ko Yoshikawa, Hiroshi Ichiryu, Hisato Tanishita, Shigenobu Suzuki, Nobuyoshi Nomizu, Akira Kondoh |