| 2013 | ISCAS | A dual-core 8051 microcontroller system based on synchronous-logic and asynchronous-logic. | Kok-Leong Chang, Tong Lin, Weng-Geng Ho, Kwen-Siong Chong, Bah-Hwee Gwee, Joseph S. Chang |
| 2012 | ISCAS | A comparative study on asynchronous Quasi-Delay-Insensitive templates. | Kok-Leong Chang, Tong Lin, Weng-Geng Ho, Kwen-Siong Chong, Bah-Hwee Gwee, Joseph S. Chang |
| 2011 | ISCAS | Improved asynchronous-logic dual-rail Sense Amplifier-based Pass Transistor Logic with high speed and low power operation. | Weng-Geng Ho, Kwen-Siong Chong, Bah-Hwee Gwee, Joseph Sylvester Chang, Yin Sun, Kok-Leong Chang |
| 2009 | ISCAS | A Performance Comparison on Asynchronous Matched-delay Templates. | Kok-Leong Chang, Bah-Hwee Gwee, Yuanjin Zheng |
| 2008 | ISCAS | A semi-custom memory design for an asynchronous 8051 microcontroller. | Kok-Leong Chang, Bah-Hwee Gwee, Yuanjin Zheng |
| 2008 | ISCAS | De-synchronization of a point-of-sales digital-logic controller. | Kok-Leong Chang, Yao Zhu, Bah-Hwee Gwee |
| 2007 | ISCAS | An Asynchronous Dual-Rail Multiplier based on Energy-Efficient STFB Templates. | Kok-Leong Chang, Bah-Hwee Gwee, Yuanjin Zheng |
| 2006 | ISCAS | A low-energy low-voltage asynchronous 8051 microcontroller core. | Kok-Leong Chang, Bah-Hwee Gwee |