Kuan-Ju Huang
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
2013–2013
Best venue rank
C
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2013 | ISCAS | A VLSI design of singular value decomposition processor used in real-time ICA computation for multi-channel EEG system. | Kuan-Ju Huang, Wei-Yeh Shih, Jui-Chieh Liao, Wai-Chi Fang |