Kunal Banerjee
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
21
Venues
14
Active years
2013–2024
Best venue rank
A*
Where they publish
Papers
21 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2024 | COMAD | Real-time Anomaly Prediction at Scale using Anomaly Detection Augmented with Regression. | Kunal Banerjee, Binay Gupta, Meet Maheshwari, Lalitdutt Parsai, Geet Vudata, Soumik Dasgupta, Anirban Chatterjee |
| 2024 | COMAD | BARGAIN: A Super-Resolution Technique to Gain High-Resolution Images for Barcodes. | Saptarshi Misra, Kunal Banerjee, Anirban Chatterjee |
| 2024 | ICPR | waLLMartCache: A Distributed, Multi-tenant and Enhanced Semantic Caching System for LLMs. | Soumik Dasgupta, Anurag Wagh, Lalitdutt Parsai, Binay Gupta, Geet Vudata, Shally Sangal, Sohom Majumdar, Hema Rajesh, Kunal Banerjee, Anirban Chatterjee |
| 2023 | COMAD | A Dynamic Attention Based Graph Neural Network for Anomaly Prediction in Multi-Variate Time-Series & Its Application in Network Monitoring. | Meet Maheshwari, Binay Gupta, Anirban Chatterjee, Kunal Banerjee |
| 2023 | COMAD | Designing a Vision Transformer based Enhanced Text Extractor for Product Images. | Saptarshi Misra, Pranay Dugar, Anirban Chatterjee, Lalitdutt Parsai, Kunal Banerjee |
| 2022 | CIKM | Developing a noise-aware AI system for change risk assessment with minimal human intervention. | Subhadip Paul, Anirban Chatterjee, Binay Gupta, Kunal Banerjee |
| 2022 | ICAART | Look before You Leap! Designing a Human-centered AI System for Change Risk Assessment. | Binay Gupta, Anirban Chatterjee, Subhadip Paul, Harika Matha, Lalitdutt Parsai, Kunal Banerjee, Vijay Agneeswaran |
| 2021 | CIKM | From Pixels to Words: A Scalable Journey of Text Information from Product Images to Retail Catalog. | Pranay Dugar, Rajesh Shreedhar Bhat, Asit Sharad Tarsode, Uddipto Dutta, Kunal Banerjee, Anirban Chatterjee, Vijay Srinivas Agneeswaran |
| 2019 | CLUSTER | Training Google Neural Machine Translation on an Intel CPU Cluster. | Dhiraj D. Kalamkar, Kunal Banerjee, Sudarshan Srinivasan, Srinivas Sridharan, Evangelos Georganas, Mikhail E. Smorkalov, Cong Xu, Alexander Heinecke |
| 2018 | ICLR | Mixed Precision Training of Convolutional Neural Networks using Integer Operations. | Dipankar Das, Naveen Mellempudi, Dheevatsa Mudigere, Dhiraj D. Kalamkar, Sasikanth Avancha, Kunal Banerjee, Srinivas Sridharan, Karthik Vaidyanathan, Bharat Kaul, Evangelos Georganas, Alexander Heinecke, Pradeep Dubey, Jess Corbal, Nikita Shustrov, Roman Dubtsov, Evarist Fomenko, Vadim O. Pirogov |
| 2018 | ICSE | Automatic detection of inverse operations while avoiding loop unrolling. | Kunal Banerjee, Ramanuj Chouksey, Chandan Karfa, Pankaj Kumar Kalita |
| 2018 | SC | Anatomy of high-performance deep learning convolutions on SIMD architectures. | Evangelos Georganas, Sasikanth Avancha, Kunal Banerjee, Dhiraj D. Kalamkar, Greg Henry, Hans Pabst, Alexander Heinecke |
| 2017 | ATVA | An Equivalence Checking Framework for Array-Intensive Programs. | Kunal Banerjee, Chittaranjan A. Mandal, Dipankar Sarkar |
| 2017 | HPDC | PRESGen: A Fully Automatic Equivalence Checker for Validating Optimizing and Parallelizing Transformations. | Soumyadip Bandyopadhyay, Kunal Banerjee |
| 2017 | ICSoft | An End-to-end Formal Verifier for Parallel Programs. | Soumyadip Bandyopadhyay, Santonu Sarkar, Kunal Banerjee |
| 2016 | HPDC | Implementing an Efficient Path Based Equivalence Checker for Parallel Programs. | Soumyadip Bandyopadhyay, Kunal Banerjee |
| 2016 | PLDI | Data-race detection: the missing piece for an end-to-end semantic equivalence checker for parallelizing transformations of array-intensive programs. | Kunal Banerjee, Soumyadip Banerjee, Santonu Sarkar |
| 2015 | ICSoft | A Path-based Equivalence Checking Method for Petri Net based Models of Programs. | Soumyadip Bandyopadhyay, Dipankar Sarkar, Kunal Banerjee, Chittaranjan A. Mandal |
| 2015 | SCAM | A translation validation framework for symbolic value propagation based equivalence checking of FSMDAs. | Kunal Banerjee, Chittaranjan A. Mandal, Dipankar Sarkar |
| 2014 | DSD | Circuits and Synthesis Mechanism for Hardware Design to Counter Power Analysis Attacks. | Partha De, Kunal Banerjee, Chittaranjan A. Mandal, Debdeep Mukhopadhyay |
| 2013 | DSD | Designing DPA Resistant Circuits Using BDD Architecture and Bottom Pre-charge Logic. | Partha De, Kunal Banerjee, Chittaranjan A. Mandal, Debdeep Mukhopadhyay |