| 2024 | DATE | PP-HDC: A Privacy-Preserving Inference Framework for Hyperdimensional Computing. | Ruixuan Wang, Wengying Wen, Kyle Juretus, Xun Jiao |
| 2024 | ISCAS | DNA: DC Nodal Analysis Attack for Analog Circuits. | Vaibhav Venugopal Rao, Kyle Juretus, Ioannis Savidis |
| 2024 | WCNC | On the Roles of Sparse Array Configuration and Weights in Optimum Beamforming. | Syed A. Hamza, Moeness G. Amin, Kyle Juretus |
| 2023 | ICASSP | Deep Learning Sparse Array Design Using Binary Switching Configurations. | Syed A. Hamza, Kyle Juretus, Moeness G. Amin, Fauzia Ahmad |
| 2020 | ISCAS | Reducing Logic Locking Key Leakage through the Scan Chain. | Kyle Juretus, Ioannis Savidis |
| 2020 | ISCAS | Security Vulnerabilities of Obfuscated Analog Circuits. | Vaibhav Venugopal Rao, Kyle Juretus, Ioannis Savidis |
| 2019 | ISCAS | Increasing the SAT Attack Resiliency of In-Cone Logic Locking. | Kyle Juretus, Ioannis Savidis |
| 2018 | ICCD | Machine Learning on the Thermal Side-Channel: Analysis of Accelerator-Rich Architectures. | David Werner, Kyle Juretus, Ioannis Savidis, Mark Hempstead |
| 2018 | ISCAS | Time Domain Sequential Locking for Increased Security. | Kyle Juretus, Ioannis Savidis |
| 2016 | ISCAS | Reducing logic encryption overhead through gate level key insertion. | Kyle Juretus, Ioannis Savidis |