| 2014 | DDECS | BuildMaster: Efficient ASIP architecture exploration through compilation and simulation result caching. | Roel Jordans, Erkan Diken, Lech Jzwiak, Henk Corporaal |
| 2014 | INDIN | A framework for automatic custom instruction identification on multi-issue ASIPs. | Alexandre Solon Nery, Nadia Nedjah, Felipe Maia Galvo Frana, Lech Jzwiak, Henk Corporaal |
| 2013 | DDECS | Exploring processor parallelism: Estimation methods and optimization strategies. | Roel Jordans, Rosilde Corvino, Lech Jzwiak, Henk Corporaal |
| 2013 | DSD | An Efficient Method for Energy Estimation of Application Specific Instruction-Set Processors. | Roel Jordans, Rosilde Corvino, Lech Jzwiak, Henk Corporaal |
| 2013 | ICA3PP | A Reconfigurable Ray-Tracing Multi-Processor SoC with Hardware Replication-Aware Instruction Set Extension. | Alexandre Solon Nery, Nadia Nedjah, Felipe M. G. Frana, Lech Jzwiak, Henk Corporaal |
| 2012 | DSD | Transformation-Based Exploration of Data Parallel Architecture for Customizable Hardware: A JPEG Encoder Case Study. | Rosilde Corvino, Erkan Diken, Abdoulaye Gamati, Lech Jzwiak |
| 2012 | DSD | Algorithm Parallelism Estimation for Constraining Instruction-Set Synthesis for VLIW Processors. | Roel Jordans, Rosilde Corvino, Lech Jzwiak |
| 2012 | DSD | ASAM: Automatic Architecture Synthesis and Application Mapping. | Lech Jzwiak, Menno Lindwer, Rosilde Corvino, Paolo Meloni, Laura Micconi, Jan Madsen, Erkan Diken, Deepak Gangadharan, Roel Jordans, Sebastiano Pomata, Paul Pop, Giuseppe Tuveri, Luigi Raffo |
| 2011 | DSD | Rapid and Accurate Leakage Power Estimation for Nano-CMOS Circuits. | Michal Bryk, Lech Jzwiak, Wieslaw Kuzmicz |
| 2011 | DSD | Hardware Reuse in Modern Application-Specific Processors and Accelerators. | Alexandre Solon Nery, Lech Jzwiak, Menno Lindwer, Mauro Cocco, Nadia Nedjah, Felipe M. G. Frana |
| 2011 | DSD | A Parallel Ray Tracing Architecture Suitable for Application-Specific Hardware and GPGPU Implementations. | Alexandre Solon Nery, Nadia Nedjah, Felipe M. G. Frana, Lech Jzwiak |
| 2011 | ICA3PP | Massively Parallel Identification of Intersection Points for GPGPU Ray Tracing. | Alexandre Solon Nery, Nadia Nedjah, Felipe M. G. Frana, Lech Jzwiak |
| 2011 | ISCAS | A parallel architecture for ray-tracing with an embedded intersection algorithm. | Alexandre Solon Nery, Nadia Nedjah, Felipe Maia Galvo Frana, Lech Jzwiak |
| 2011 | PDP | Issues and Challenges in Development of Massively-Parallel Heterogeneous MPSoCs Based on Adaptable ASIPs. | Lech Jzwiak, Menno Lindwer |
| 2008 | DSD | Technology Library Modelling for Information-driven Circuit Synthesis. | Lech Jzwiak, Szymon Bieganski |
| 2006 | DSD | Quality-Driven Template-Based Architecture Synthesis for Real-time Embedded SoCs. | Lech Jzwiak, Sien-An Ong |
| 2006 | DSD | Multi-objective Optimal FSM State Assignment. | Lech Jzwiak, Aleksander Slusarczyk, Dominik Gawlowski |
| 2005 | DSD | High-quality Sub-function Construction in the Information-driven Circuit Synthesis with Gates. | Lech Jzwiak, Szymon Bieganski |
| 2004 | DSD | Life-Inspired Systems. | Lech Jzwiak |
| 2004 | DSD | Information Trans-Coders in Information-Driven Circuit Synthesis. | Lech Jzwiak, Szymon Bieganski |
| 2004 | DSD | An Effective Solution of Benchmarking Problem FSM Benchmark Generator and Its Application to Analysis of State Assignment Methods. | Lech Jzwiak, Dominik Gawlowski, Aleksander Slusarczyk |
| 2003 | DSD | Information-driven Library-based Circuit Synthesis. | Lech Jzwiak, Szymon Bieganski, Artur Chojnacki |
| 2001 | DATE | High-quality sub-function construction in functional decomposition based on information relationship measures. | Lech Jzwiak, Artur Chojnacki |
| 2001 | DSD | Effective and Efficient FPGA Synthesis through Functional Decomposition Based on Information Relationship Measures. | Lech Jzwiak, Artur Chojnacki |
| 2001 | DSD | Fast and Compact Sequential Circuits through the Information-Driven Circuit Synthesis. | Lech Jzwiak, Artur Chojnacki, Aleksander Slusarczyk |
| 2001 | DSD | Regular Realization of Symmetric Functions Using Reversible Logic. | Marek A. Perkowski, Malgorzata Chrzanowska-Jeske, Alan Mishchenko, Xiaoyu Song, Anas Al-Rabadi, Bart Massey, Pawel Kerntopf, Andrzej Buller, Lech Jzwiak, Alan J. Coppola |