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Liangjian Lyu

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

16

Venues

2

Active years

2019–2026

Best venue rank

C

Where they publish

Papers

16 indexed papers, newest first.

YearVenueTitleAuthors
2026ISCASA Miniaturized Wireless Multimodal Physiological In-Vivo Monitoring Platform Featuring Power-Efficient Photoelectrochemical Sensing.Zepeng Huang, Lifeng Yan, Wenxian Gu, Xing Wu, Liangjian Lyu
2026ISCASAn Injection-Locked Eight Phase Clock Generator with Edge Replacement and Injection Error Calibration Achieving -253.7dB FOMJitter-N.Sirou Li, Weijia Zeng, Kaiyun Cao, Liangjian Lyu, C.-J. Richard Shi, Hao Min
2026ISCASA Neural Spike Sorting Framework with Multi-Scale Slope Detection and Lite-CNN Classification.Yulun Peng, Wenxian Gu, Jingjie Tang, Lifeng Yan, Xing Wu, Liangjian Lyu
2026ISCASAn All-MOS 1-nA Current Reference Insensitive to Process and Voltage Variations.Kexin Shan, Jiaqing Rui, Yuting Wan, Wenxian Gu, Xing Wu, C.-J. Richard Shi, Liangjian Lyu
2026ISCASAn Optimized Pre-Emphasis Spike Detector for High-Density Neural Interfaces.Jingjie Tang, Yulun Peng, Hengchang Bi, Xing Wu, C.-J. Richard Shi, Liangjian Lyu
2026ISCASA 51-nW Feature Extraction Analog Front-End for Voice Activity Detection.Xuhaohan Wang, Zirui Dong, Xing Wu, Liangjian Lyu
2025ISCASA 40W 915MHz Receiver with Sub-Passive Third-Harmonic Mixer Achieving -88dBm Sensitivity and Multi-Channel Selection.Binbin Chen, Heyu Ren, Wenjun Gong, Sirou Li, Liangjian Lyu, C.-J. Richard Shi
2025ISCASA 915MHz 97nW Low-Area Wake-Up Receiver with an Envelope-Tracking Mixer Achieving -73.2dBm Sensitivity.Binbin Chen, Heyu Ren, Wenjun Gong, Liangjian Lyu, Chuanjin Richard Shi
2025ISCASA 240-mV 33.8-μV/°C 1.5-nW Voltage Detector for Energy Harvesting.Wenjun Gong, Binbin Chen, Liangjian Lyu, C.-J. Richard Shi
2025ISCASA 0.473 μJ/class Seizure Detection Processor with LSVM Classifier and LPF-Based Feature Extraction.Wenxian Gu, Xudong Hao, Hengchang Bi, Xing Wu, C.-J. Richard Shi, Liangjian Lyu
2025ISCASA Reference Double-Sampling PLL-Based Eight Phase Clock Generator Achieving 0.18mW/GHz/phase and -251.9dB FOMJitter-N.Sirou Li, Weijia Zeng, Kaiyun Cao, Liangjian Lyu, Chuanjin Richard Shi
2023ISCASA $2.53 \mu \mathrm{W}/\text{channel}$ Event-Driven Neural Spike Sorting Processor with Sparsity-Aware Computing-In-Memory Macros.Hao Jiang, Jiapei Zheng, Yunzhengmao Wang, Jinshan Zhang, Haozhe Zhu, Liangjian Lyu, Yingping Chen, Chixiao Chen, Qi Liu
2020ISCASA 400 MHz, 8-Bit, 1.75-ps Resolution Pipelined-Two-Step Time-to-Digital Converter with Dynamic Time Amplification.Yuting Tu, Rongjin Xu, Dawei Ye, Liangjian Lyu, Chuanjin Richard Shi
2019ASPDACA low-voltage low-power multi-channel neural interface IC using level-shifted feedback technology.Liangjian Lyu, Yu Wang, Chixiao Chen, Chuanjin Richard Shi
2019ISCASA 340nW/Channel Neural Recording Analog Front-End using Replica-Biasing LNAs to Tolerate 200mVpp Interfere from 350mV Power Supply.Liangjian Lyu, Dawei Ye, Chuanjin Richard Shi
2019ISCASA 2.46GHz, -88dBm Sensitivity CMOS Passive Mixer-First Nonlinear Receiver with >50dB Tolerance to In-Band Interferer.Dawei Ye, Rongjin Xu, Liangjian Lyu, Chuanjin Richard Shi