| 2025 | ISCAS | An Efficient Hardware Implementation of 2D Convolution based on the Discrete Hirschman Transform. | Weiwei Wang, Linda S. DeBrunner, Victor E. DeBrunner |
| 2024 | ACSSC | Very Efficient Convolutional Neural Network Based on the Discrete Hirschman Transform. | Weiwei Wang, Victor E. DeBrunner, Linda S. DeBrunner, Dingli Xue, Hanqing Zhao, Ranran Tao |
| 2023 | ICASSP | Fast Convolution Algorithm for Real-Valued Finite Length Sequences. | Weiwei Wang, Victor E. DeBrunner, Linda S. DeBrunner |
| 2023 | ISCAS | Engaging Students in an Introductory Circuits Course. | Linda S. DeBrunner, Victor E. DeBrunner |
| 2022 | ACSSC | Hardware Performance of Complex Dot-Product Implementations. | Linda S. DeBrunner, Victor E. DeBrunner |
| 2021 | ACSSC | IIR Filter Sensitivity Predicts Filter Wordlength. | Victor E. DeBrunner, Linda S. DeBrunner |
| 2020 | ACSSC | How the Sampling Rate Impacts Wordlength Selection for FIR Filter Implementations. | Victor E. DeBrunner, Linda S. DeBrunner |
| 2019 | ACSSC | Hardware Implementation of Discrete Hirschman Transform Convolution Using Distributed Arithmetic. | Dingli Xue, Victor E. DeBrunner, Linda S. DeBrunner |
| 2018 | ACSSC | Hardware Implementation of Hirschman Optimal Transform Based on Distributed Arithmetic. | Dingli Xue, Linda S. DeBrunner, Victor E. DeBrunner |
| 2017 | ACSSC | Truncated multiply-and-accumulate units for FIR filter implementation with reduced coefficient length. | Linda S. DeBrunner, Dewey Williams, Christopher Riker |
| 2017 | ACSSC | Radix-4 modular pipeline fast Fourier transform algorithm. | Alekhya Lakkadi, Linda S. DeBrunner |
| 2017 | ACSSC | An effective hardware implementation of 1024-point linear convolution based on Hirschman Optimal Transform. | Dingli Xue, Linda S. DeBrunner |
| 2008 | ACSSC | Sparse FIR filters and the impact on FPGA area usage. | Sean G. Patronis, Linda S. DeBrunner |