Linqi Shi
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
7
Venues
1
Active years
2016–2021
Best venue rank
C
Where they publish
Papers
7 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2021 | ISCAS | A 2-Bit 4-Level 4-Wire 56Gb/s Transceiver in 14nm FinFET. | Kai Sheng, Linqi Shi, Weixin Gai, Qianting Hua, Peng Lin |
| 2019 | ISCAS | An 8-12GHz 0.92° Phase Error Quadrature Clock Generator Based on Two-Stage Poly Phase Filter with Intermediate Point Compensation. | Xiao Xiang, Weixin Gai, Linqi Shi, Ai He, Kai Sheng |
| 2018 | ISCAS | A 108fs | Yinxuan Lyu, Jianhua Feng, Chenfeng Tu, Linqi Shi, Hongfei Ye, Weixin Gai, Dunshan Yu |
| 2018 | ISCAS | A Sub-ps Integrated-Jitter 10 GHz ADPLL with Fractional Capacitor. | Linqi Shi, Weixin Gai, Jichao Huang, Liangxiao Tang, Xiao Xiang |
| 2018 | ISCAS | An 8.52-11.34 GHz 0.34° Phase Error Quadrature Clock Generator with Time-Voltage-Time Convertor. | Linqi Shi, Weixin Gai, Xiaoting Zhi, Liangxiao Tang, Xiao Xiang |
| 2017 | ISCAS | A 40 Gb/s 74.9 mW PAM4 receiver with novel clock and data recovery. | Liangxiao Tang, Weixin Gai, Linqi Shi, Xiao Xiang |
| 2016 | ISCAS | PAM4 receiver with adaptive threshold voltage and adaptive decision feedback equalizer. | Liangxiao Tang, Weixin Gai, Linqi Shi |