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Luis A. Tarazona

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

3

Venues

2

Active years

2007–2010

Best venue rank

C

Where they publish

Papers

3 indexed papers, newest first.

YearVenueTitleAuthors
2010DSDDescription-Level Optimisation of Synthesisable Asynchronous Circuits.Luis A. Tarazona, Doug A. Edwards, Andrew Bardsley, Luis A. Plana
2009DSDA Synthesisable Quasi-Delay Insensitive Result Forwarding Unit for an Asynchronous Processor.Luis A. Tarazona, Doug A. Edwards, Luis A. Plana
2007CASESPerformance-driven syntax-directed synthesis of asynchronous processors.Luis A. Plana, Doug A. Edwards, Sam Taylor, Luis A. Tarazona, Andrew Bardsley