Luis J. Saiz-Adalid
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
12
Venues
4
Active years
2010–2025
Best venue rank
Unranked
Where they publish
Papers
12 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2025 | EDCC | Initial Insights into Synthesis Overheads Caused by C-Based Error Correction Codes Implementations. | Joaquin Gracia-Moran, David de Andrs, Luis J. Saiz-Adalid, Juan Carlos Ruiz, Juan-Carlos Baraza-Calvo, Daniel Gil-Tomas, Pedro J. Gil-Vicente |
| 2025 | EDCC | Towards SW-Based Robustness Assessment of HW Accelerators for Quantized CNNs. | Juan Carlos Ruiz, David de Andrs, Luis J. Saiz-Adalid, Joaquin Gracia-Moran |
| 2025 | EDCC | Towards a Novel 8-Bit Floating-Point Format to Increase Robustness in Convolutional Neural Networks. | Luis J. Saiz-Adalid, Juan-Carlos Ruiz-Garcia, Joaquin Gracia-Moran, David de Andrs, Juan-Carlos Baraza-Calvo, Daniel Gil-Tomas, Pedro J. Gil-Vicente |
| 2025 | SAFECOMP | Can C-Based ECC Models Leverage High-Level Synthesis? Evaluating Description Variants for Efficient Circuit Implementations. | Joaquin Gracia-Moran, Juan-Carlos Ruiz-Garcia, David de Andrs, Luis J. Saiz-Adalid |
| 2024 | EDCC | Zero-Space In-Weight and In-Bias Protection for Floating-Point-based CNNs. | Juan Carlos Ruiz, David de Andrs, Luis J. Saiz-Adalid, Joaquin Gracia-Moran |
| 2024 | SAFECOMP | In-Memory Zero-Space Floating-Point-Based CNN Protection Using Non-significant and Invariant Bits. | Juan Carlos Ruiz, David de Andrs, Luis J. Saiz-Adalid, Joaquin Gracia-Moran |
| 2016 | EDCC | Ultrafast Error Correction Codes for Double Error Detection/Correction. | Luis J. Saiz-Adalid, Pedro J. Gil, Juan Carlos Ruiz, Joaquin Gracia-Moran, Daniel Gil-Tomas, Juan-Carlos Baraza-Calvo |
| 2015 | EDCC | Ultrafast Single Error Correction Codes for Protecting Processor Registers. | Luis J. Saiz-Adalid, Pedro J. Gil, Joaquin Gracia-Moran, Daniel Gil-Tomas, Juan-Carlos Baraza-Calvo |
| 2014 | EDCC | Modified Hamming Codes to Enhance Short Burst Error Detection in Semiconductor Memories (Short Paper). | Luis J. Saiz-Adalid, Pedro J. Gil, Juan-Carlos Baraza-Calvo, Juan-Carlos Ruiz-Garcia, Daniel Gil-Tomas, Joaquin Gracia-Moran |
| 2013 | SAFECOMP | Flexible Unequal Error Control Codes with Selectable Error Detection and Correction Levels. | Luis J. Saiz-Adalid, Pedro J. Gil-Vicente, Juan-Carlos Ruiz-Garcia, Daniel Gil-Tomas, Juan Carlos Baraza, Joaquin Gracia-Moran |
| 2010 | DSN | Experimental validation of a fault tolerant microcomputer system against intermittent faults. | Joaquin Gracia-Moran, Daniel Gil-Tomas, Luis J. Saiz-Adalid, Juan Carlos Baraza, Pedro J. Gil-Vicente |
| 2010 | PRDC | Searching Representative and Low Cost Fault Models for Intermittent Faults in Microcontrollers: A Case Study. | Joaquin Gracia-Moran, Daniel Gil-Tomas, Juan Carlos Baraza, Luis J. Saiz-Adalid, Pedro J. Gil-Vicente |