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Lukasz Szustak

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

15

Venues

5

Active years

2009–2025

Best venue rank

National

Where they publish

Papers

15 indexed papers, newest first.

YearVenueTitleAuthors
2025ICCSAdvances in Adapting Memory-Bound CFD Computations to RISC-V Multicore Architecture.Tomasz Olas, Lukasz Szustak, Roman Wyrzykowski, Mateusz Olas, Marco Lapegna
2024PPAMEfficient Allocation of Image Recognition and LLM Tasks on Multi-GPU System.Marcin Lawenda, Krzesimir Samborski, Kyrylo Khloponin, Lukasz Szustak
2023EuroParParallel Auto-Scheduling of Counting Queries in Machine Learning Applications on HPC Systems.Pawel Bratek, Lukasz Szustak, Jaroslaw Zola
2021EuroParHeterogeneous Voltage Frequency Scaling of Data-Parallel Applications for Energy Saving on Homogeneous Multicore Platforms.Pawel Bratek, Lukasz Szustak, Roman Wyrzykowski, Tomasz Olas, Tomasz Chmiel
2021EuroParParallelization and Auto-scheduling of Data Access Queries in ML Workloads.Pawel Bratek, Lukasz Szustak, Jaroslaw Zola
2019EuroParToward Heterogeneous MPI+MPI Programming: Comparison of OpenMP and MPI Shared Memory Models.Lukasz Szustak, Roman Wyrzykowski, Kamil Halbiniak, Pawel Bratek
2019PPAMPerformance Optimizations for Parallel Modeling of Solidification with Dynamic Intensity of Computation.Kamil Halbiniak, Lukasz Szustak, Adam Kulawik, Pawel Gepner
2017PACTIslands-of-Cores Approach for Harnessing SMP/NUMA Architectures in Heterogeneous Stencil Computations.Lukasz Szustak, Roman Wyrzykowski, Ondrej Jakl
2016ICA3PPNetwork-Aware Optimization of MPDATA on Homogeneous Multi-core Clusters with Heterogeneous Network.Tania Malik, Lukasz Szustak, Roman Wyrzykowski, Alexey L. Lastovetsky
2016ICA3PPUsing hStreams Programming Library for Accelerating a Real-Life Application on Intel MIC.Lukasz Szustak, Kamil Halbiniak, Adam Kulawik, Roman Wyrzykowski, Piotr Uminski, Marcin Sasinowski
2015PPAMToward Parallel Modeling of Solidification Based on the Generalized Finite Difference Method Using Intel Xeon Phi.Lukasz Szustak, Kamil Halbiniak, Adam Kulawik, Joanna Wrbel, Pawel Gepner
2013PPAMPerformance Analysis for Stencil-Based 3D MPDATA Algorithm on GPU Architecture.Krzysztof Rojek, Lukasz Szustak, Roman Wyrzykowski
2013PPAMUsing Intel Xeon Phi Coprocessor to Accelerate Computations in MPDATA Algorithm.Lukasz Szustak, Krzysztof Rojek, Pawel Gepner
2011PPAMParallelization of EULAG Model on Multicore Architectures with GPU Accelerators.Krzysztof Rojek, Lukasz Szustak
2009PPAMAdaptation of Double-Precision Matrix Multiplication to the Cell Broadband Engine Architecture.Krzysztof Rojek, Lukasz Szustak