Luks Starecek
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
2
Venues
1
Active years
2006–2008
Best venue rank
C
Where they publish
Papers
2 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2008 | DDECS | Reduction of Test Vectors Volume by Means of Gate-Level Reconfiguration. | Luks Starecek, Luks Sekanina, Zdenek Kotsek |
| 2006 | DDECS | Novel Logic Circuits Controlled by Vdd: Transistor-Level Simulations of Polymorphic Combinational Modules. | Luks Sekanina, Luks Starecek, Zdenek Kotsek |