Manolis Katevenis
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
20
Venues
12
Active years
1987–2025
Best venue rank
A*
Where they publish
Papers
20 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2025 | DSD | NET4EXA: Pioneering the Future of Interconnects for Supercomputing and AI. | Michele Martinelli, Roberto Ammendola, Andrea Biagioni, Carlotta Chiarini, Ottorino Frezza, Francesca Lo Cicero, Alessandro Lonardo, Pier Stanislao Paolucci, Elena Pastorelli, Pierpaolo Perticaroli, Luca Pontisso, Cristian Rossi, Francesco Simula, Piero Vicini, David Colin, Grgoire Pichon, Alexandre Louvet, John Gliksberg, Claire Chen, Matteo Turisini, Andrea Monterubbiano, Jean-Philippe Nomin, Denis Dutoit, Hugo Taboada, Lilia Zaourar, Mohamed Benazouz, Angelos Bilas, Fabien Chaix, Manolis Katevenis, Nikolaos Chrysos, Evangelos Mageiropoulos, Christos Kozanitis, Thomas Moen, Steffen Persvold, Einar Rustad, Sandro Fiore, Fabrizio Granelli, Simone Pezzuto, Raffaello Potestio, Luca Tubiana, Philippe Velha, Flavio Vella, Daniele De Sensi, Salvatore Pontarelli |
| 2022 | DSD | RED-SEA: Network Solution for Exascale Architectures. | Andrea Biagioni, Paolo Cretaro, Ottorino Frezza, Francesca Lo Cicero, Alessandro Lonardo, Michele Martinelli, Pier Stanislao Paolucci, Elena Pastorelli, Francesco Simula, Matteo Turisini, Piero Vicini, Roberto Ammendola, Pascale Bernier-Bruna, Claire Chen, Said Derradji, Stphane Guez, Pierre-Axel Lagadec, Gregoire Pichon, Etienne Walter, Gaetan De Gassowski, Matthieu Hautreaux, Stephane Mathieu, Gilles Moreau, Marc Prache, Hugo Taboada, Torsten Hoefler, Timo Schneider, Matteo Barnaba, Giuseppe Piero Brandino, Francesco De Giorgi, Matteo Poggi, Iakovos Mavroidis, Yannis Papaefstathiou, Nikolaos Tampouratzis, Benjamin Kalisch, Ulrich Krackhardt, Mondrian Nuessle, Pantelis Xirouchakis, Vangelis Mageiropoulos, Michalis Gianioudis, Harisis Loukas, Aggelos Ioannou, Nikos Kallimanis, Nikos Chrysos, Manolis Katevenis, Wolfgang Frings, Dominik Gottwald, Felime Guimaraes, Max Holicki, Volker Marx, Yannik Mller, Carsten Clauss, Hugo Falter, Xu Huang, Jennifer Lopez Barillao, Thomas Moschny, Simon Pickartz, Francisco J. Alfaro, Jess Escudero-Sahuquillo, Pedro Javier Garca, Francisco J. Quiles, Jos L. Snchez, Adrin Castell, Jose Duro, Mara Engracia Gmez, Enrique S. Quintana-Ort, Julio Sahuquillo, Eugenio Stabile |
| 2021 | FCCM | Using hls4ml to Map Convolutional Neural Networks on Interconnected FPGA Devices. | Evangelos Mageiropoulos, Nikolaos Chrysos, Nikolaos Dimou, Manolis Katevenis |
| 2019 | SC | Implementation and Impact of an Ultra-Compact Multi-FPGA Board for Large System Prototyping. | Fabien Chaix, Georgios Ailamakis, Theocharis Vavouris, Astrinos Damianakis, Manolis Katevenis, Iakovos Mavroidis, Aggelos Ioannou, Nikolaos Kossifidis, Nikolaos Dimou, Giorgos Ieronymakis, Manolis Marazakis, Vassilis Papaefstathiou, Vassilis Flouris, Mihailis Ligerakis |
| 2017 | DSD | The Next Generation of Exascale-Class Systems: The ExaNeSt Project. | Roberto Ammendola, Andrea Biagioni, Paolo Cretaro, Ottorino Frezza, Francesca Lo Cicero, Alessandro Lonardo, Michele Martinelli, Pier Stanislao Paolucci, Elena Pastorelli, Francesco Simula, Piero Vicini, Giuliano Taffoni, Jose Antonio Pascual, Javier Navaridas, Mikel Lujn, John Goodacre, Nikolaos Chrysos, Manolis Katevenis |
| 2016 | DSD | The ExaNeSt Project: Interconnects, Storage, and Packaging for Exascale Systems. | Manolis Katevenis, Nikolaos Chrysos, Manolis Marazakis, Iakovos Mavroidis, Fabien Chaix, Nikolaos D. Kallimanis, Javier Navaridas, John Goodacre, Piero Vicini, Andrea Biagioni, Pier Stanislao Paolucci, Alessandro Lonardo, Elena Pastorelli, Francesca Lo Cicero, Roberto Ammendola, P. Hopton, P. Coates, Giuliano Taffoni, Stefano Cozzini, Martin L. Kersten, Y. Zhang, Julio Sahuquillo, Sergio Lechago, C. Pinto, Bernd Lietzow, D. Everett, Gino Perna |
| 2014 | DSD | EUROSERVER: Energy Efficient Node for European Micro-Servers. | Yves Durand, Paul M. Carpenter, Stefano Adami, Angelos Bilas, Denis Dutoit, Alexis Farcy, Georgi Gaydadjiev, John Goodacre, Manolis Katevenis, Manolis Marazakis, Emil Mats, Iakovos Mavroidis, John Thomson |
| 2013 | ICS | Prefetching and cache management using task lifetimes. | Vassilis Papaefstathiou, Manolis Katevenis, Dimitrios S. Nikolopoulos, Dionisios N. Pnevmatikatos |
| 2012 | FCCM | Formic: Cost-efficient and Scalable Prototyping of Manycore Architectures. | Spyros Lyberis, George Kalokerinos, Michalis Lygerakis, Vassilis Papaefstathiou, Dimitrios Tsaliagkos, Manolis Katevenis, Dionisios N. Pnevmatikatos, Dimitrios S. Nikolopoulos |
| 2011 | DATE | Fine-grain OpenMP runtime support with explicit communication hardware primitives. | Pranav Tendulkar, Vassilis Papaefstathiou, George Nikiforos, Stamatis G. Kavadias, Dimitrios S. Nikolopoulos, Manolis Katevenis |
| 2011 | ISCC | An efficient sequential iterative matching algorithm for CIOQ switches. | Yanping Gao, Christoforos Kachris, Manolis Katevenis |
| 2006 | INFOCOM | Scheduling in Non-Blocking Buffered Three-Stage Switching Fabrics. | Nikolaos Chrysos, Manolis Katevenis |
| 2005 | GLOBECOM | Scheduling in switches with small internal buffers. | Nikolaos Chrysos, Manolis Katevenis |
| 2004 | GLOBECOM | Multiple priorities in a two-lane buffered crossbar. | Nikolaos Chrysos, Manolis Katevenis |
| 1998 | HPCA | Credit-Flow-Controlled ATM for MP Interconnection: The ATLAS I Single-Chip ATM Switch. | Manolis Katevenis, Dimitrios N. Serpanos, Emmanuel Spyridakis |
| 1997 | HPCA | User-Level DMA without Operating System Kernel Modification. | Evangelos P. Markatos, Manolis Katevenis |
| 1996 | HPCA | Telegraphos: High-Performance Networking for Parallel Processing on Workstation Clusters. | Evangelos P. Markatos, Manolis Katevenis |
| 1995 | SIGCOMM | Pipelined Memory Shared Buffer for VLSI Switches. | Manolis Katevenis, Panagiota Vatsolaki, Aristides Efthymiou |
| 1991 | ASPLOS | Reducing the Branch Penalty by Rearranging Instructions in Double-Width Memory. | Manolis Katevenis, Nestoras Tzartzanis |
| 1987 | DAC | A Vector Hardware Accelerator with Circuit Simulation Emphasis. | Andrei Vladimirescu, David Weiss, Manolis Katevenis, Zvika Bronstein, Alon Kifir, Karja Danuwidjaja, K. C. Ng, Niraj Jain, Steven Lass |