| 2026 | FCCM | Combining HLS and Computation Coding for Balanced Matrix-Vector Engines on FPGA. | Sayanti Pal, Alexander Lehnert, Marc Reichenbach |
| 2024 | DATE | Towards an Embedded System for Failure Diagnosis in Drones Using AI and SAC-DM on FPGA. | Rafael Batista, Matthias Nickel, Alexander Lehnert, Sergio A. Pertuz, Marc Reichenbach, Diana Goehringer, Alisson Brito |
| 2022 | DSD | Suitability of ISAs for Data Paths Based on Redundant Number Systems: Is RISC-V the best? | Johannes Kndtel, Sebastian Rachuj, Marc Reichenbach |
| 2021 | ISORC | Taming Non-Deterministic Low-Level I/O: Predictable Multi-Core Real-Time Systems by SoC Co-Design. | Steffen Vaas, Peter Ulbrich, Christian Eichler, Peter Wgemann, Marc Reichenbach, Dietmar Fey |
| 2018 | EuroPar | Programmable HSA Accelerators for Zynq UltraScale+ MPSoC Systems. | Wolfgang Bauer, Philipp Holzinger, Marc Reichenbach, Steffen Vaas, Paul Hartke, Dietmar Fey |
| 2016 | ICIP | Low-power analog smart camera sensor for edge detection. | Christopher Soell, Lan Shi, Jrgen Rber, Marc Reichenbach, Robert Weigel, Amelie Hagelauer |
| 2012 | ISORC | A Generic VHDL Template for 2D Stencil Code Applications on FPGAs. | Michael Schmidt, Marc Reichenbach, Dietmar Fey |
| 2011 | ISORC | Analytical Model for the Optimization of Self-Organizing Image Processing Systems Utilizing Cellular Automata. | Marc Reichenbach, Michael Schmidt, Dietmar Fey |
| 2010 | ISORC | Realizing Real-Time Centroid Detection of Multiple Objects with Marching Pixels Algorithms. | Dietmar Fey, Marcus Komann, Marc Reichenbach, Ralf Seidler |