Marco Annaratone
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
11
Venues
5
Active years
1983–1998
Best venue rank
A*
Where they publish
Papers
11 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 1998 | ISCA | Warp Architecture and Implementation. | Marco Annaratone, Emmanuel A. Arnould, Thomas R. Gross, H. T. Kung, Monica S. Lam, Onat Menzilcioglu, Ken Sarocky, Jon A. Webb |
| 1991 | SC | The K2 distributed memory parallel processor: architecture, compiler, and operating system. | Marco Annaratone, Marco Fillo, M. Halbherr, Roland Rhl, P. Steiner, Marc A. Viredaz |
| 1990 | ISCA | The K2 Parallel Processor: Architecture and Hardware Implementation. | Marco Annaratone, Marco Fillo, Kiyoshi Nakabayashi, Marc A. Viredaz |
| 1990 | ICS | Parallelization of FORTRAN code on distributed-memory parallel processors. | Roland Rhl, Marco Annaratone |
| 1989 | ISCA | Interprocessor Communication Speed and Performance in Distributed-memory Parallel Processors. | Marco Annaratone, Claude Pommerell, Roland Rhl |
| 1989 | ISCA | Performance Measurements on a Commercial Multiprocessor Running Parallel Code. | Marco Annaratone, Roland Rhl |
| 1989 | SC | K9: a simulator of distributed-memory parallel processors. | Peter Beadle, Claude Pommerell, Marco Annaratone |
| 1986 | ICASSP | Using warp as a supercomputer in signal processing. | Marco Annaratone, Emmanuel A. Arnould, H. T. Kung, Onat Menzilcioglu |
| 1986 | ISCA | Warp Architecture and Implementation. | Marco Annaratone, Emmanuel A. Arnould, Thomas R. Gross, H. T. Kung, Monica S. Lam, Onat Menzilcioglu, Ken Sarocky, Jon A. Webb |
| 1984 | ICASSP | A family of custom VLSI circuits for speech recognition. | Thomas S. Anantharaman, Marco Annaratone, Roberto Bisiani |
| 1983 | ARITH | A multiplier with multiple error correction capability. | Marco Annaratone, Renato Stefanelli |