| 2013 | DDECS | Fault tolerant CAN bus control system implemented into FPGA. | Karel Szurman, Jan Kastil, Martin Straka, Zdenek Kotsek |
| 2013 | DSD | Methodology for Fault Tolerant System Design Based on FPGA into Limited Redundant Area. | Lukas Miculka, Martin Straka, Zdenek Kotsek |
| 2012 | DDECS | Test platform for fault tolerant systems design properties verification. | Martin Straka, Lukas Miculka, Jan Kastil, Zdenek Kotsek |
| 2012 | DSD | Dependability Analysis of Fault Tolerant Systems Based on Partial Dynamic Reconfiguration Implemented into FPGA. | Jan Kastil, Martin Straka, Lukas Miculka, Zdenek Kotsek |
| 2011 | DDECS | Advanced fault tolerant bus for multicore system implemented in FPGA. | Martin Straka, Jan Kastil, Jaroslav Novotn, Zdenek Kotsek |
| 2011 | DSD | SEU Simulation Framework for Xilinx FPGA: First Step towards Testing Fault Tolerant Systems. | Martin Straka, Jan Kastil, Zdenek Kotsek |
| 2010 | DDECS | Modern fault tolerant architectures based on partial dynamic reconfiguration in FPGAs. | Martin Straka, Jan Kastil, Zdenek Kotsek |
| 2010 | DSD | Fault Tolerant Structure for SRAM-Based FPGA via Partial Dynamic Reconfiguration. | Martin Straka, Jan Kastil, Zdenek Kotsek |
| 2009 | DSD | High Availability Fault Tolerant Architectures Implemented into FPGAs. | Martin Straka, Zdenek Kotsek |
| 2008 | DSD | Digital Systems Architectures Based on On-line Checkers. | Martin Straka, Zdenek Kotsek, Jan Winter |
| 2007 | DSD | Online Protocol Testing for FPGA Based Fault Tolerant Systems. | Jiri Tobola, Zdenek Kotsek, Jan Korenek, Toms Martnek, Martin Straka |