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Masaru Kakimoto

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

1

Venues

1

Active years

1998–1998

Best venue rank

B

Where they publish

Papers

1 indexed papers, newest first.

YearVenueTitleAuthors
1998ASPDACPre-layout Delay Calculation Specification for CMOS ASIC Libraries.Hisakazu Edamatsu, Katsumi Homma, Masaru Kakimoto, Yutaka Koike, Kinya Tabuchi