| 2020 | ICCD | An Implementation of External Capacitor-less Low-DropOut Voltage Regulator in 45nm Technology with Output Voltage Ranging from 0.4V-1.2V. | Farid Uddin Ahmed, Zarin Tasnim Sandhie, Masud H. Chowdhury |
| 2019 | ISCAS | Design of Energy Efficient SRAM Cell Based on Double Gate Schottky-Barrier-Type GNRFET with Minimum Dimer Lines. | Mahmood Uddin Mohammed, Masud H. Chowdhury |
| 2019 | ISCAS | A Low Leakage SRAM Bitcell Design Based on MOS-Type Graphene Nano-Ribbon FET. | Mahmood Uddin Mohammed, Athiya Nizam, Liaquat Ali, Masud H. Chowdhury |
| 2018 | ISCAS | Failure Analysis of the Through Silicon Via in Three-dimensional Integrated Circuit (3D-IC). | Nahid M. Hossain, Ritesh Kumar Reddy Kuchukulla, Masud H. Chowdhury |
| 2018 | ISCAS | Capacitor-less Low-Dropout Regulator (LDO) with Improved PSRR and Enhanced Slew-Rate. | Marouf Khan, Masud H. Chowdhury |
| 2017 | ISCAS | Noise voltage analysis of spiral inductor for on-chip buck converter design. | Emeshaw Ashenafi, Masud H. Chowdhury |
| 2017 | ISCAS | Nodal thermal analysis for multi-VT SOFFET based subthreshold circuits. | Emeshaw Ashenafi, Azzedin D. Es-Sakhi, Masud H. Chowdhury |
| 2017 | ISCAS | Impacts of different shapes of through-silicon-via core on 3D IC performance. | Abdul Hamid Bin Yousuf, Nahid M. Hossain, Masud H. Chowdhury |
| 2016 | ISCAS | Detection of biochemical molecules using CM-SOFFET based biosensor. | Emeshaw Ashenafi, Azzedin D. Es-Sakhi, Masud H. Chowdhury |
| 2015 | ISCAS | Analysis of subthreshold swing in multichannel tunneling carbon nanotube field effect transistor (MT-CNTFET). | Azzedin D. Es-Sakhi, Masud H. Chowdhury |
| 2015 | ISCAS | Analysis of radiation effect on the threshold voltage of flash memory device. | Nahid M. Hossain, Jitendra Koppu, Masud H. Chowdhury |
| 2015 | ISCAS | Multilayer molybdenum disulfide (MoS2) based tunnel transistor. | Muhammad Sana Ullah, Masud H. Chowdhury |
| 2015 | ISCAS | Performance analysis of through silicon via (TSV) and through glass via (TGV) for different materials. | Abdul Hamid Bin Yousuf, Nahid M. Hossain, Masud H. Chowdhury |
| 2014 | ISCAS | Multilayer graphene nanoribbon floating gate transistor for flash memory. | Nahid M. Hossain, Masud H. Chowdhury |
| 2014 | ISCAS | Analysis of RLC interconnect delay model using second order approximation. | Muhammad Sana Ullah, Masud H. Chowdhury |
| 2012 | ISCAS | Exploiting negative quantum capacitance of carbon nanotube FETs for low power applications. | Md. Sajjad Rahaman, Masud H. Chowdhury |
| 2011 | ISCAS | Addressing crosstalk issue in on-chip carbon nanotube interconnects using negative capacitance. | Md. Khaled Hassan, Md. Sajjad Rahaman, Masud H. Chowdhury |
| 2011 | ISCAS | Spatial- and temporal-reliability aware design for nano-scale VLSI circuits. | Md. Sajjad Rahaman, Qing Duan, Masud H. Chowdhury |
| 2011 | ISCAS | A circuit implementation for dynamic thermal management techniques. | Pritesh Vora, Masud H. Chowdhury |
| 2009 | ISCAS | Crosstalk Avoidance and Error-correction Coding for Coupled RLC Interconnects. | Md. Sajjad Rahaman, Masud H. Chowdhury |
| 2008 | ISCAS | Innovative power gating for leakage reduction. | Masud H. Chowdhury, Juliana Gjanci, Pervez Khaled |
| 2008 | ISCAS | Time diversity approach for intra-chip RF/wireless interconnect systems. | Md. Sajjad Rahaman, Masud H. Chowdhury |
| 2008 | ISCAS | Analysis of the impacts of signal rise/fall time and skew variations in coupled-RLC interconnects. | Abinash Roy, Masud H. Chowdhury |
| 2008 | ISCAS | Full waveform accuracy to estimate delay in coupled digital circuits. | Jingye Xu, Pervez Khaled, Masud H. Chowdhury |
| 2008 | ISCAS | Optimization technique for flip-flop inserted global interconnect. | Jingye Xu, Abinash Roy, Masud H. Chowdhury |
| 2007 | DAC | Effects of Coupling Capacitance and Inductance on Delay Uncertainty and Clock Skew. | Abinash Roy, Noha H. Mahmoud, Masud H. Chowdhury |
| 2007 | DATE | Interactive presentation: Analysis of power consumption and BER of flip-flop based interconnect pipelining. | Jingye Xu, Abinash Roy, Masud H. Chowdhury |
| 2007 | ISCAS | Global Interconnect Optimization in the Presence of On-chip Inductance. | Abinash Roy, Masud H. Chowdhury |
| 2007 | ISCAS | Delay and Clock Skew Variation due to Coupling Capacitance and Inductance. | Abinash Roy, Noha H. Mahmoud, Masud H. Chowdhury |
| 2007 | ISCAS | Power Consumption Analysis of Flip-flop Based Interconnect Pipelining. | Jingye Xu, Abinash Roy, Masud H. Chowdhury |
| 2006 | ISCAS | Compound noise analysis in digital circuits using blind source separation. | Vivek Nigam, Masud H. Chowdhury, Roland Priemer |
| 2005 | DSN | Engineering Over-Clocking: Reliability-Performance Trade-Offs for High-Performance Register Files. | Gokhan Memik, Masud H. Chowdhury, Arindam Mallik, Yehea I. Ismail |
| 2003 | DAC | Realizable RLCK circuit crunching. | Chirayu S. Amin, Masud H. Chowdhury, Yehea I. Ismail |
| 2003 | ISCAS | Realizable reduction of RLC circuits using node elimination. | Masud H. Chowdhury, Chirayu S. Amin, Yehea I. Ismail, Chandramouli V. Kashyap, Byron Krauter |
| 2002 | ISCAS | Performance analysis of deep sub micron VLSI circuits in the presence of self and mutual inductance. | Masud H. Chowdhury, Yehea I. Ismail, Chandramouli V. Kashyap, Byron Krauter |