Matheus Trevisan Moreira
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
5
Venues
4
Active years
2013–2025
Best venue rank
C
Where they publish
Papers
5 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2025 | DATE | A 3D Design Methodology for Integrated Wearable SoCs: Enabling Energy Efficiency and Enhanced Performance at Iso-Area Footprint. | Huseyin Ekin Sumbul, Arne Symons, Lita Yang, Huichu Liu, Tony F. Wu, Matheus Trevisan Moreira, Debabrata Mohapatra, Abhinav Agarwal, Kaushik Ravindran, Chris Thompson, Yuecheng Li, Edith Beign |
| 2021 | ASPDAC | Read your Circuit: Leveraging Word Embedding to Guide Logic Optimization. | Walter Lau Neto, Matheus Trevisan Moreira, Luca G. Amar, Cunxi Yu, Pierre-Emmanuel Gaillardon |
| 2015 | DSD | A Bundled-Data Asynchronous Circuit Synthesis Flow Using a Commercial EDA Framework. | Matheus Gibiluka, Matheus Trevisan Moreira, Ney Laert Vilar Calazans |
| 2013 | DSD | LiChEn: Automated Electrical Characterization of Asynchronous Standard Cell Libraries. | Matheus Trevisan Moreira, Carlos Henrique Menezes Oliveira, Ney Laert Vilar Calazans, Luciano Copello Ost |
| 2013 | ICCD | Voltage scaling on C-elements: A speed, power and energy efficiency analysis. | Matheus Trevisan Moreira, Ney Laert Vilar Calazans |