Matthew Horsnell
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
6
Venues
5
Active years
2007–2015
Best venue rank
B
Where they publish
Papers
6 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2015 | EUC | Evaluation of Hybrid Run-Time Power Models for the ARM Big.LITTLE Architecture. | Krastin Nikov, Jos L. Nez-Yez, Matthew Horsnell |
| 2010 | EuroPar | Scalable Object-Aware Hardware Transactional Memory. | Behram Khan, Matthew Horsnell, Mikel Lujn, Ian Watson |
| 2008 | HPCC | An Object-Aware Hardware Transactional Memory System. | Behram Khan, Matthew Horsnell, Ian Rogers, Mikel Lujn, Andrew Dinn, Ian Watson |
| 2008 | ICA3PP | Adaptive Loop Tiling for a Multi-cluster CMP. | Jisheng Zhao, Matthew Horsnell, Mikel Lujn, Ian Rogers, Chris C. Kirkham, Ian Watson |
| 2008 | SPAA | A first insight into object-aware hardware transactional memory. | Behram Khan, Matthew Horsnell, Ian Rogers, Mikel Lujn, Andrew Dinn, Ian Watson |
| 2007 | EuroPar | Optimizing Chip Multiprocessor Work Distribution Using Dynamic Compilation. | Jisheng Zhao, Matthew Horsnell, Ian Rogers, Andrew Dinn, Chris C. Kirkham, Ian Watson |