Mauro Chinosi
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
3
Active years
1995–1999
Best venue rank
A*
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 1999 | DAC | Parallel Mixed-Level Power Simulation Based on Spatio-Temporal Circuit Partitioning. | Mauro Chinosi, Roberto Zafalon, Carlo Guardiani |
| 1998 | ISLPED | Automatic characterization and modeling of power consumption in static RAMs. | Mauro Chinosi, Roberto Zafalon, Carlo Guardiani |
| 1997 | ICDAR | Words Recognition using Associative Memory. | Loris Navoni, Roberto Canegallo, Mauro Chinosi, Giovanni Gozzini, Alan Kramer, Pier Luigi Rolandi |
| 1995 | ISLPED | Ultra-low-power analog associative memory core using flash-EEPROM-based programmable capacitors. | Alan Kramer, Roberto Canegallo, Mauro Chinosi, D. Doise, Giovanni Gozzini, Pier Luigi Rolandi, Marco Sabatini, P. Zabberoni |