| 2023 | DDECS | NeuroPIM: Felxible Neural Accelerator for Processing-in-Memory Architectures. | Ali Monavari Bidgoli, Sepideh Fattahi, Seyyed Hossein Seyyedaghaei Rezaei, Mehdi Modarressi, Masoud Daneshtalab |
| 2023 | ISCAS | NCOD: Near-Optimum Video Compression for Object Detection. | Ardavan Elahi, Ali Falahati, Farhad Pakdaman, Mehdi Modarressi, Moncef Gabbouj |
| 2022 | ASPDAC | Multi-Precision Deep Neural Network Acceleration on FPGAs. | Negar Neda, Salim Ullah, Azam Ghanbari, Hoda Mahdiani, Mehdi Modarressi, Akash Kumar |
| 2021 | DSD | Network-on-ReRAM for Scalable Processing-in-Memory Architecture Design. | Bita Dabiri, Mehdi Modarressi, Masoud Daneshtalab |
| 2021 | IJCNN | RoCo-NAS: Robust and Compact Neural Architecture Search. | Vahid Geraeinejad, Sima Sinaei, Mehdi Modarressi, Masoud Daneshtalab |
| 2017 | HPCA | Near-Ideal Networks-on-Chip for Servers. | Pejman Lotfi-Kamran, Mehdi Modarressi, Hamid Sarbazi-Azad |
| 2016 | DATE | Fault-tolerant 3-D network-on-chip design using dynamic link sharing. | Seyyed Hossein Seyyedaghaei Rezaei, Mehdi Modarressi, Reza Yazdani Aminabadi, Masoud Daneshtalab |
| 2016 | DSD | Low-Power Online ECG Analysis Using Neural Networks. | Mehdi Modarressi, Ali Yasoubi, Maryam Modarressi |
| 2016 | PDP | A Three-Dimensional Networks-on-Chip Architecture with Dynamic Buffer Sharing. | Seyyed Hossein Seyyedaghaei Rezaei, Mehdi Modarressi, Masoud Daneshtalab, Shervin Roshanisefat |
| 2015 | DATE | A hybrid packet/circuit-switched router to accelerate memory access in NoC-based chip multiprocessors. | Abbas Mazloumi, Mehdi Modarressi |
| 2015 | DATE | An energy-efficient virtual channel power-gating mechanism for on-chip networks. | Amirhossein Mirhosseini, Mohammad Sadrosadati, Ali Fakhrzadehgan, Mehdi Modarressi, Hamid Sarbazi-Azad |
| 2015 | ICONIP | CuPAN - High Throughput On-chip Interconnection for Neural Networks. | Ali Yasoubi, Reza Hojabr, Hengameh Takshi, Mehdi Modarressi, Masoud Daneshtalab |
| 2013 | PDP | Power and Performance Efficient Partial Circuits in Packet-Switched Networks-on-Chip. | Nasibeh Teimouri, Mehdi Modarressi, Hamid Sarbazi-Azad |
| 2012 | DSD | A Game Theoretical Thermal - Aware Run - Time Task Synchronization Method for Multiprocessor Systems - on - Chip. | Yashar Asgarieh, Mohammad Hassan Khabbazian, Mehdi Modarressi, Hamid Sarbazi-Azad |
| 2011 | DATE | Supporting non-contiguous processor allocation in mesh-based CMPs using virtual point-to-point links. | Marjan Asadinia, Mehdi Modarressi, Arash Tavakkol, Hamid Sarbazi-Azad |
| 2011 | ICCD | A reconfigurable fault-tolerant routing algorithm to optimize the network-on-chip performance and latency in presence of intermittent and permanent faults. | Reyhaneh Jabbarvand Behrouz, Mehdi Modarressi, Hamid Sarbazi-Azad |
| 2011 | PDCAT | A Distributed Task Migration Scheme for Mesh-Based Chip-Multiprocessors. | Hossein Yaghoubi, Mehdi Modarressi, Hamid Sarbazi-Azad |
| 2010 | DAC | An efficient dynamically reconfigurable on-chip network architecture. | Mehdi Modarressi, Hamid Sarbazi-Azad, Arash Tavakkol |
| 2009 | DATE | A hybrid packet-circuit switched on-chip network based on SDM. | Mehdi Modarressi, Hamid Sarbazi-Azad, Mohammad Arjomand |
| 2008 | ICCD | The 2D DBM: An attractive alternative to the simple 2D mesh topology for on-chip networks. | Reza Sabbaghi-Nadooshan, Mehdi Modarressi, Hamid Sarbazi-Azad |
| 2007 | ICCD | Power-aware mapping for reconfigurable NoC architectures. | Mehdi Modarressi, Hamid Sarbazi-Azad |