Meriem Zidouni
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
2
Venues
2
Active years
2008–2009
Best venue rank
B
Where they publish
Papers
2 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2009 | AINA | Modeling Multiprocessor Cache Protocol Impact on MPI Performance. | Ghassan Chehaibar, Meriem Zidouni, Radu Mateescu |
| 2008 | DATE | Quantitative Evaluation in Embedded System Design: Validation of Multiprocessor Multithreaded Architectures. | Nicolas Coste, Hubert Garavel, Holger Hermanns, Richard Hersemeule, Yvain Thonnart, Meriem Zidouni |