| 2014 | ISCAS | Design of a frequency reference based on a PVT-independent transmission line delay. | Florian De Roose, Valentijn De Smedt, Wouter Volkaerts, Michiel Steyaert, Georges G. E. Gielen, Patrick Reynaert, Wim Dehaene |
| 2010 | ISCAS | All-digital differential VCO-based A/D conversion. | Jorg Daniels, Wim Dehaene, Michiel Steyaert |
| 2009 | DATE | Massively multi-topology sizing of analog integrated circuits. | Pieter Palmers, Trent McConaghy, Michiel Steyaert, Georges G. E. Gielen |
| 2009 | ISCAS | Analysis of Fractional Spur Reduction using SigmaDelta-noise Cancellation in Digital-PLL. | Kameswaran Vengattaramane, Jan Craninckx, Michiel Steyaert |
| 2008 | ICCAD | Automated extraction of expert knowledge in analog topology selection and sizing. | Trent McConaghy, Pieter Palmers, Georges G. E. Gielen, Michiel Steyaert |
| 2008 | ISCAS | A/D conversion using an Asynchronous Delta-Sigma Modulator and a time-to-digital converter. | Jorg Daniels, Wim Dehaene, Michiel Steyaert, Andreas Wiesbauer |
| 2008 | ISCAS | A low-power mixing DAC IR-UWB-receiver. | Hans Danneels, Marian Verhelst, Pieter Palmers, Wim Vereecken, Bruno Boury, Wim Dehaene, Michiel Steyaert, Georges G. E. Gielen |
| 2007 | DAC | Simultaneous Multi-Topology Multi-Objective Sizing Across Thousands of Analog Circuit Topologies. | Trent McConaghy, Pieter Palmers, Georges G. E. Gielen, Michiel Steyaert |
| 2007 | DATE | An efficient methodology for hierarchical synthesis of mixed-signal systems with fully integrated building block topology selection. | Tom Eeckelaert, Raf Schoofs, Georges G. E. Gielen, Michiel Steyaert, Willy M. C. Sansen |
| 2006 | DAC | Hierarchical bottom--up analog optimization methodology validated by a delta-sigma A/D converter design for the 802.11a/b/g standard. | Tom Eeckelaert, Raf Schoofs, Georges G. E. Gielen, Michiel Steyaert, Willy M. C. Sansen |
| 2006 | ISCAS | A 7.5mW, 11-bit continuous-time sigma-delta A/D converter for WLAN applications. | Raf Schoofs, Michiel Steyaert, Willy M. C. Sansen |
| 2004 | ISCAS | Knowledge- and optimization-based design of RF power amplifiers. | Joo Ramos, Kenneth Francken, Georges G. E. Gielen, Michiel Steyaert |
| 2004 | ISLPED | Architectures for low power ultra-wideband radio receivers in the 3.1-5GHz band for data rates < 10Mbps. | Marian Verhelst, Wim Vereecken, Michiel Steyaert, Wim Dehaene |
| 2002 | DAC | CMOS: a paradigm for low power wireless? | Michiel Steyaert, Peter J. Vancorenland |
| 2002 | DAC | Systematic design of a 200 MS/s 8-bit interpolating/averaging A/D converter. | Jan Vandenbussche, Koen Uyttenhove, Erik Lauwers, Michiel Steyaert, Georges G. E. Gielen |
| 2002 | DATE | Systematic Design of a 200 Ms/S 8-bit Interpolating A/D Converter. | Jan Vandenbussche, Erik Lauwers, Koen Uyttenhove, Michiel Steyaert, Georges G. E. Gielen |
| 2002 | ICCAD | Optimization of a fully integrated low power CMOS GPS receiver. | Peter J. Vancorenland, Philippe Coppejans, Wouter De Cock, Paul Leroux, Michiel Steyaert |
| 2002 | ISLPED | Design techniques for low power high bandwidth upconversion in CMOS. | Carl De Ranter, Michiel Steyaert |
| 2001 | ICCAD | A Layout-Aware Synthesis Methodology for RF Circuits. | Peter J. Vancorenland, Geert Van der Plas, Michiel Steyaert, Georges G. E. Gielen, Willy M. C. Sansen |
| 2000 | DAC | CYCLONE: automated design and layout of RF LC-oscillators. | Carl De Ranter, Bram De Muer, Geert Van der Plas, Peter J. Vancorenland, Michiel Steyaert, Georges G. E. Gielen, Willy M. C. Sansen |
| 2000 | DAC | Optimal RF design using smart evolutionary algorithms. | Peter J. Vancorenland, Carl De Ranter, Michiel Steyaert, Georges G. E. Gielen |
| 2000 | ISCAS | The optimization of GHz integrated CMOS quadrature VCO's based on a poly-phase filter loaded differential oscillator. | Marc Borremans, Bram De Muer, Michiel Steyaert |
| 2000 | ISCAS | The extraction of transistor mismatch parameters: the CMOS current-steering D/A converter as a test structure. | Anne Van den Bosch, Michiel Steyaert, Willy Sansen |
| 2000 | ISCAS | An accurate statistical yield model for CMOS current-steering D/A converters. | Anne Van den Bosch, Michiel Steyaert, Willy Sansen |
| 1995 | ICCAD | A high-level design and optimization tool for analog RF receiver front-ends. | Jan Crols, Stphane Donnay, Michiel Steyaert, Georges G. E. Gielen |
| 1994 | ISCAS | Analogue CMOS VLSI Implementation of Cellular Neural Networks with Continuously Programmable Templates. | Peter R. Kinget, Michiel Steyaert |
| 1993 | ISCAS | Low-voltage Analog CMOS Filter Design. | Michiel Steyaert, Jan Crols, S. Gogaert, Willy M. C. Sansen |