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Mirko Loghi

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

12

Venues

3

Active years

2004–2012

Best venue rank

A

Where they publish

Papers

12 indexed papers, newest first.

YearVenueTitleAuthors
2012DATEApplication-specific memory partitioning for joint energy and lifetime optimization.Haroon Mahmood, Massimo Poncino, Mirko Loghi, Enrico Macii
2012ISLPEDEnergy-optimal caches with guaranteed lifetime.Mirko Loghi, Haroon Mahmood, Andrea Calimera, Massimo Poncino, Enrico Macii
2011DATEPartitioned cache architectures for reduced NBTI-induced aging.Andrea Calimera, Mirko Loghi, Enrico Macii, Massimo Poncino
2010ISLPEDDynamic indexing: concurrent leakage and aging optimization for caches.Andrea Calimera, Mirko Loghi, Enrico Macii, Massimo Poncino
2007DATEArchitectural leakage-aware management of partitioned scratchpad memories.Olga Golubeva, Mirko Loghi, Massimo Poncino, Enrico Macii
2007ISLPEDLocality-driven architectural cache sub-banking for leakage energy reduction.Olga Golubeva, Mirko Loghi, Enrico Macii, Massimo Poncino
2006ISLPEDSynchronization-driven dynamic speed scaling for MPSoCs.Mirko Loghi, Massimo Poncino, Luca Benini
2005DATEVirtual Hardware Prototyping through Timed Hardware-Software Co-Simulation.Franco Fummi, Mirko Loghi, Stefano Martini, Marco Monguzzi, Giovanni Perbellini, Massimo Poncino
2005DATETag Overflow Buffering: An Energy-Efficient Cache Architecture.Mirko Loghi, Paolo Azzoni, Massimo Poncino
2005DATEExploring Energy/Performance Tradeoffs in Shared Memory MPSoCs: Snoop-Based Cache Coherence vs. Software Solutions.Mirko Loghi, Massimo Poncino
2004DATEAnalyzing On-Chip Communication in a MPSoC Environment.Mirko Loghi, Federico Angiolini, Davide Bertozzi, Luca Benini, Roberto Zafalon
2004ICCDAnalyzing Power Consumption of Message Passing Primitives in a Single-Chip Multiprocessor.Mirko Loghi, Luca Benini, Massimo Poncino