Moshe Levinger
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
3
Active years
1995–1999
Best venue rank
A*
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 1999 | DAC | Developing an Architecture Validation Suite: Applicaiton to the PowerPC Architecture. | Laurent Fournier, Anatoly Koyfman, Moshe Levinger |
| 1999 | DATE | Functional Verification Methodology for Microprocessors Using the Genesys Test-Program Generator-Application to the x86 Microprocessors Family. | Laurent Fournier, Yaron Arbetman, Moshe Levinger |
| 1999 | ICASSP | Fast construction of test-program generators for digital signal processors. | Shai Rubin, Moshe Levinger, Randall R. Pratt, William P. Moore |
| 1995 | DAC | Test Program Generation for Functional Verification of PowerPC Processors in IBM. | Aharon Aharon, Dave Goodman, Moshe Levinger, Yossi Lichtenstein, Yossi Malka, Charlotte Metzger, Moshe Molcho, Gil Shurek |