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Motokazu Ozawa

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

3

Venues

2

Active years

1997–2005

Best venue rank

C

Where they publish

Papers

3 indexed papers, newest first.

YearVenueTitleAuthors
2005ICCDLow-Power Design of 90-nm SuperH Processor Core.Tetsuya Yamada, Masahide Abe, Yusuke Nitta, Kenji Ogura, Manabu Kusaoke, Makoto Ishikawa, Motokazu Ozawa, Kiwamu Takada, Fumio Arakawa, Osamu Nishii, Toshihiro Hattori
1998ASPDACTITAC-2: An Asynchronous 32-bit Microprocessor.Akihiro Takamura, Motokazu Ozawa, Izumi Fukasaku, Taro Fujii, Yoichiro Ueno, Masashi Imai, Masashi Kuwako, Takashi Nanya
1997ICCDTITAC-2: An asynchronous 32-bit microprocessor based on Scalable-Delay-Insensitive model.Akihiro Takamura, Masashi Kuwako, Masashi Imai, Taro Fujii, Motokazu Ozawa, Izumi Fukasaku, Yoichiro Ueno, Takashi Nanya