N. Punithavathi
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
2004–2004
Best venue rank
C
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2004 | CIT | Task Scheduling Algorithm for Interconnection Constrained Network of Heterogeneous Processors. | E. Ilavarasan, P. Thambidurai, N. Punithavathi |