Nainesh Agarwal
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
3
Venues
1
Active years
2006–2008
Best venue rank
C
Where they publish
Papers
3 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2008 | ISCAS | FSMD partitioning for low power using simulated annealing. | Nainesh Agarwal, Nikitas J. Dimopoulos |
| 2007 | ISCAS | Towards Automated Power Gating of Registers using CoDeL. | Nainesh Agarwal, Nikitas J. Dimopoulos |
| 2006 | ISCAS | Power efficient rapid hardware development using CoDel and automated clock gating. | Nainesh Agarwal, Nikitas J. Dimopoulos |