Naoyuki Kawabe
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
4
Active years
2000–2007
Best venue rank
A*
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2007 | ICCD | An automated runtime power-gating scheme. | Mototsugu Hamada, Takeshi Kitahara, Naoyuki Kawabe, Hironori Sato, Tsuyoshi Nishikawa, Takayoshi Shimazawa, Takahiro Yamashita, Hiroyuki Hara, Yukihito Oowaki |
| 2005 | DATE | Area-Efficient Selective Multi-Threshold CMOS Design Methodology for Standby Leakage Power Reduction. | Takeshi Kitahara, Naoyuki Kawabe, Fumihiro Minami, Katsuhiro Seta, Toshiyuki Furusawa |
| 2002 | ISLPED | Automated selective multi-threshold design for ultra-low standby applications. | Kimiyoshi Usami, Naoyuki Kawabe, Masayuki Koizumi, Katsuhiro Seta, Toshiyuki Furusawa |
| 2000 | DAC | Function-level power estimation methodology for microprocessors. | Gang Qu, Naoyuki Kawabe, Kimiyoshi Usami, Miodrag Potkonjak |