| 2021 | DATE | Towards Automatic Design and Verification for Level 3 of the European Train Control System. | Robert Wille, Tom Peham, Judith Przigoda, Nils Przigoda |
| 2018 | MODELSWARD | Analyzing Frame Conditions in UML/OCL Models - Consistency Equivalence and Independence. | Philipp Niemann, Nils Przigoda, Robert Wille, Rolf Drechsler |
| 2018 | MODELSWARD | Generation and Validation of Frame Conditions in Formal Models. | Philipp Niemann, Nils Przigoda, Robert Wille, Rolf Drechsler |
| 2017 | MEMOCODE | More than true or false: native support of irregular values in the automatic validation & verification of UML/OCL models. | Nils Przigoda, Philipp Niemann, Judith Peters, Frank Hilken, Robert Wille, Rolf Drechsler |
| 2016 | MEMOCODE | Clocks vs. instants relations: Verifying CCSL time constraints in UML/MARTE models. | Judith Peters, Nils Przigoda, Robert Wille, Rolf Drechsler |
| 2016 | MEMOCODE | Frame conditions in symbolic representations of UML/OCL models. | Nils Przigoda, Jonas Gomes Filho, Philipp Niemann, Robert Wille, Rolf Drechsler |
| 2016 | MODELS | Integrating an SMT-Based ModelFinder into USE. | Nils Przigoda, Frank Hilken, Judith Peters, Robert Wille, Martin Gogolla, Rolf Drechsler |
| 2016 | MODELS | Ground setting properties for an efficient translation of OCL in SMT-based model finding. | Nils Przigoda, Robert Wille, Rolf Drechsler |
| 2015 | DAC | A generic representation of CCSL time constraints for UML/MARTE models. | Judith Peters, Robert Wille, Nils Przigoda, Ulrich Khne, Rolf Drechsler |
| 2015 | DDECS | Contradiction Analysis for Inconsistent Formal Models. | Nils Przigoda, Robert Wille, Rolf Drechsler |
| 2015 | DSD | Verification-Driven Design Across Abstraction Levels: A Case Study. | Nils Przigoda, Jannis Stoppe, Julia Seiter, Robert Wille, Rolf Drechsler |
| 2015 | DSD | Leveraging the Analysis for Invariant Independence in Formal System Models. | Nils Przigoda, Robert Wille, Rolf Drechsler |
| 2015 | MODELS | Checking concurrent behavior in UML/OCL models. | Nils Przigoda, Christoph Hilken, Robert Wille, Jan Peleska, Rolf Drechsler |
| 2015 | MODELS | Towards an Automatic Approach for Restricting UML/OCL Invariability Clauses. | Nils Przigoda, Judith Peters, Mathias Soeken, Robert Wille, Rolf Drechsler |
| 2012 | ASPDAC | Synthesis of reversible circuits with minimal lines for large functions. | Mathias Soeken, Robert Wille, Christoph Hilken, Nils Przigoda, Rolf Drechsler |